Classic Timing Analyzer report for triple_selector_8b
Mon Mar 07 10:24:29 2022
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Parallel Compilation
  5. tpd
  6. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-----------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                               ;
+------------------------------+-------+---------------+-------------+------+----+------------+----------+--------------+
; Type                         ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+------+----+------------+----------+--------------+
; Worst-case tpd               ; N/A   ; None          ; 16.101 ns   ; BY   ; Y6 ; --         ; --       ; 0            ;
; Total number of failed paths ;       ;               ;             ;      ;    ;            ;          ; 0            ;
+------------------------------+-------+---------------+-------------+------+----+------------+----------+--------------+


+--------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                                           ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                              ; Setting            ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                                         ; EP2C8Q208C8        ;      ;    ;             ;
; Timing Models                                                       ; Final              ;      ;    ;             ;
; Default hold multicycle                                             ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains                           ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                              ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                                      ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                                    ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                               ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements                             ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                                    ; Off                ;      ;    ;             ;
; Enable Clock Latency                                                ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                                       ; Off                ;      ;    ;             ;
; Minimum Core Junction Temperature                                   ; 0                  ;      ;    ;             ;
; Maximum Core Junction Temperature                                   ; 85                 ;      ;    ;             ;
; Number of source nodes to report per destination node               ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                               ; 10                 ;      ;    ;             ;
; Number of paths to report                                           ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                                        ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                              ; Off                ;      ;    ;             ;
; Report IO Paths Separately                                          ; Off                ;      ;    ;             ;
; Perform Multicorner Analysis                                        ; On                 ;      ;    ;             ;
; Reports the worst-case path for each clock domain and analysis      ; Off                ;      ;    ;             ;
; Removes common clock path pessimism (CCPP) during slack computation ; Off                ;      ;    ;             ;
; Output I/O Timing Endpoint                                          ; Near End           ;      ;    ;             ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 4           ;
;                            ;             ;
; Average used               ; 1.00        ;
; Maximum used               ; 1           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     1 processor            ; 100.0%      ;
;     2-4 processors         ;   0.0%      ;
+----------------------------+-------------+


+---------------------------------------------------------+
; tpd                                                     ;
+-------+-------------------+-----------------+------+----+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
+-------+-------------------+-----------------+------+----+
; N/A   ; None              ; 16.101 ns       ; BY   ; Y6 ;
; N/A   ; None              ; 15.802 ns       ; AY   ; Y6 ;
; N/A   ; None              ; 15.533 ns       ; BY   ; Y5 ;
; N/A   ; None              ; 15.448 ns       ; BY   ; Y1 ;
; N/A   ; None              ; 15.059 ns       ; BY   ; Y2 ;
; N/A   ; None              ; 15.018 ns       ; B6   ; Y6 ;
; N/A   ; None              ; 14.809 ns       ; A1   ; Y1 ;
; N/A   ; None              ; 14.793 ns       ; B2   ; Y2 ;
; N/A   ; None              ; 14.673 ns       ; BY   ; Y3 ;
; N/A   ; None              ; 14.653 ns       ; BY   ; Y0 ;
; N/A   ; None              ; 14.271 ns       ; BY   ; Y7 ;
; N/A   ; None              ; 14.263 ns       ; B5   ; Y5 ;
; N/A   ; None              ; 14.243 ns       ; C6   ; Y6 ;
; N/A   ; None              ; 14.234 ns       ; AY   ; Y5 ;
; N/A   ; None              ; 14.152 ns       ; AY   ; Y1 ;
; N/A   ; None              ; 14.062 ns       ; A5   ; Y5 ;
; N/A   ; None              ; 13.973 ns       ; A6   ; Y6 ;
; N/A   ; None              ; 13.949 ns       ; CY   ; Y6 ;
; N/A   ; None              ; 13.897 ns       ; A0   ; Y0 ;
; N/A   ; None              ; 13.829 ns       ; BY   ; Y4 ;
; N/A   ; None              ; 13.768 ns       ; AY   ; Y2 ;
; N/A   ; None              ; 13.685 ns       ; CY   ; Y5 ;
; N/A   ; None              ; 13.662 ns       ; A2   ; Y2 ;
; N/A   ; None              ; 13.484 ns       ; C2   ; Y2 ;
; N/A   ; None              ; 13.409 ns       ; B1   ; Y1 ;
; N/A   ; None              ; 13.376 ns       ; AY   ; Y3 ;
; N/A   ; None              ; 13.362 ns       ; AY   ; Y0 ;
; N/A   ; None              ; 13.348 ns       ; B0   ; Y0 ;
; N/A   ; None              ; 13.191 ns       ; CY   ; Y2 ;
; N/A   ; None              ; 13.149 ns       ; C5   ; Y5 ;
; N/A   ; None              ; 12.995 ns       ; CY   ; Y1 ;
; N/A   ; None              ; 12.981 ns       ; AY   ; Y7 ;
; N/A   ; None              ; 12.730 ns       ; C1   ; Y1 ;
; N/A   ; None              ; 12.665 ns       ; C7   ; Y7 ;
; N/A   ; None              ; 12.656 ns       ; A7   ; Y7 ;
; N/A   ; None              ; 12.630 ns       ; B4   ; Y4 ;
; N/A   ; None              ; 12.565 ns       ; B7   ; Y7 ;
; N/A   ; None              ; 12.532 ns       ; AY   ; Y4 ;
; N/A   ; None              ; 12.414 ns       ; CY   ; Y7 ;
; N/A   ; None              ; 12.344 ns       ; C0   ; Y0 ;
; N/A   ; None              ; 12.325 ns       ; C4   ; Y4 ;
; N/A   ; None              ; 12.158 ns       ; CY   ; Y3 ;
; N/A   ; None              ; 12.140 ns       ; CY   ; Y0 ;
; N/A   ; None              ; 11.975 ns       ; CY   ; Y4 ;
; N/A   ; None              ; 9.351 ns        ; A3   ; Y3 ;
; N/A   ; None              ; 8.853 ns        ; B3   ; Y3 ;
; N/A   ; None              ; 8.008 ns        ; A4   ; Y4 ;
; N/A   ; None              ; 7.755 ns        ; C3   ; Y3 ;
+-------+-------------------+-----------------+------+----+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
    Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
    Info: Processing started: Mon Mar 07 10:24:29 2022
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off triple_selector_8b -c triple_selector_8b --timing_analysis_only
Info: Parallel compilation is enabled and will use 4 of the 4 processors detected
Info: Longest tpd from source pin "BY" to destination pin "Y6" is 16.101 ns
    Info: 1: + IC(0.000 ns) + CELL(0.985 ns) = 0.985 ns; Loc. = PIN_31; Fanout = 8; PIN Node = 'BY'
    Info: 2: + IC(6.949 ns) + CELL(0.651 ns) = 8.585 ns; Loc. = LCCOMB_X33_Y11_N0; Fanout = 1; COMB Node = 'inst27~0'
    Info: 3: + IC(0.366 ns) + CELL(0.624 ns) = 9.575 ns; Loc. = LCCOMB_X33_Y11_N10; Fanout = 1; COMB Node = 'inst27'
    Info: 4: + IC(3.430 ns) + CELL(3.096 ns) = 16.101 ns; Loc. = PIN_30; Fanout = 0; PIN Node = 'Y6'
    Info: Total cell delay = 5.356 ns ( 33.27 % )
    Info: Total interconnect delay = 10.745 ns ( 66.73 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 212 megabytes
    Info: Processing ended: Mon Mar 07 10:24:29 2022
    Info: Elapsed time: 00:00:00
    Info: Total CPU time (on all processors): 00:00:00


