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162
counter_8b_with_input/counter_8b_with_input.bsf
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162
counter_8b_with_input/counter_8b_with_input.bsf
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/*
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||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
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||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
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||||||
|
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1375
microprogram_adder/counter_8b_with_input.bdf
Normal file
1375
microprogram_adder/counter_8b_with_input.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
162
microprogram_adder/counter_8b_with_input.bsf
Normal file
162
microprogram_adder/counter_8b_with_input.bsf
Normal file
@ -0,0 +1,162 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
(header "symbol" (version "1.1"))
|
||||||
|
(symbol
|
||||||
|
(rect 16 16 112 240)
|
||||||
|
(text "counter_8b_with_input" (rect 5 0 135 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "inst" (rect 8 208 25 220)(font "Arial" ))
|
||||||
|
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|
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|
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|
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|
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|
)
|
||||||
705
microprogram_adder/microprogram_adder.bdf
Normal file
705
microprogram_adder/microprogram_adder.bdf
Normal file
@ -0,0 +1,705 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37)(line_width 1))
|
||||||
|
)
|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
(port
|
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|
(pt 0 16)
|
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|
(input)
|
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|
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
|
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|
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
|
||||||
|
(line (pt 0 16)(pt 14 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 32)
|
||||||
|
(input)
|
||||||
|
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
|
||||||
|
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
|
||||||
|
(line (pt 0 32)(pt 14 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 64 24)
|
||||||
|
(output)
|
||||||
|
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
|
||||||
|
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
|
||||||
|
(line (pt 42 24)(pt 64 24)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(line (pt 14 12)(pt 30 12)(line_width 1))
|
||||||
|
(line (pt 14 37)(pt 31 37)(line_width 1))
|
||||||
|
(line (pt 14 12)(pt 14 37)(line_width 1))
|
||||||
|
(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(symbol
|
||||||
|
(rect 1160 928 1224 976)
|
||||||
|
(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
|
||||||
|
(text "inst9" (rect 3 37 26 49)(font "Arial" ))
|
||||||
|
(port
|
||||||
|
(pt 0 16)
|
||||||
|
(input)
|
||||||
|
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
|
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|
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
|
||||||
|
(line (pt 0 16)(pt 14 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 32)
|
||||||
|
(input)
|
||||||
|
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
|
||||||
|
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
|
||||||
|
(line (pt 0 32)(pt 14 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 64 24)
|
||||||
|
(output)
|
||||||
|
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
|
||||||
|
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
|
||||||
|
(line (pt 42 24)(pt 64 24)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(line (pt 14 12)(pt 30 12)(line_width 1))
|
||||||
|
(line (pt 14 37)(pt 31 37)(line_width 1))
|
||||||
|
(line (pt 14 12)(pt 14 37)(line_width 1))
|
||||||
|
(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 800)
|
||||||
|
(pt 112 800)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 816)
|
||||||
|
(pt 112 816)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 800)
|
||||||
|
(pt 112 816)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 832)
|
||||||
|
(pt 112 832)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 816)
|
||||||
|
(pt 112 832)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 848)
|
||||||
|
(pt 112 848)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 832)
|
||||||
|
(pt 112 848)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 864)
|
||||||
|
(pt 112 864)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 848)
|
||||||
|
(pt 112 864)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 880)
|
||||||
|
(pt 112 880)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 864)
|
||||||
|
(pt 112 880)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 896)
|
||||||
|
(pt 112 896)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 880)
|
||||||
|
(pt 112 896)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 912)
|
||||||
|
(pt 112 912)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 896)
|
||||||
|
(pt 112 912)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 112 912)
|
||||||
|
(pt 112 976)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 928)
|
||||||
|
(pt 136 928)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 136 928)
|
||||||
|
(pt 136 936)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 944)
|
||||||
|
(pt 168 944)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 800)
|
||||||
|
(pt 360 800)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 816)
|
||||||
|
(pt 360 816)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 832)
|
||||||
|
(pt 360 832)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 848)
|
||||||
|
(pt 360 848)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 864)
|
||||||
|
(pt 360 864)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 880)
|
||||||
|
(pt 360 880)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 896)
|
||||||
|
(pt 360 896)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 320 912)
|
||||||
|
(pt 360 912)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1112 872)
|
||||||
|
(pt 1160 872)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1112 944)
|
||||||
|
(pt 1160 944)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1112 800)
|
||||||
|
(pt 1112 872)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1112 872)
|
||||||
|
(pt 1112 944)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 800)
|
||||||
|
(pt 1112 800)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1112 800)
|
||||||
|
(pt 1160 800)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 168 944)
|
||||||
|
(pt 168 1080)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 976 800)
|
||||||
|
(pt 976 1080)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 928 800)
|
||||||
|
(pt 976 800)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 976 800)
|
||||||
|
(pt 1008 800)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 360 992)
|
||||||
|
(pt 336 992)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 976 1080)
|
||||||
|
(pt 336 1080)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 336 1080)
|
||||||
|
(pt 168 1080)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 360 1032)
|
||||||
|
(pt 336 1032)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 336 992)
|
||||||
|
(pt 336 1032)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 336 1032)
|
||||||
|
(pt 336 1080)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 224 960)
|
||||||
|
(pt 184 960)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 184 960)
|
||||||
|
(pt 184 1048)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 144 1048)
|
||||||
|
(pt 184 1048)
|
||||||
|
)
|
||||||
|
(junction (pt 112 816))
|
||||||
|
(junction (pt 112 832))
|
||||||
|
(junction (pt 112 848))
|
||||||
|
(junction (pt 112 864))
|
||||||
|
(junction (pt 112 880))
|
||||||
|
(junction (pt 112 896))
|
||||||
|
(junction (pt 112 912))
|
||||||
|
(junction (pt 1112 800))
|
||||||
|
(junction (pt 1112 872))
|
||||||
|
(junction (pt 976 800))
|
||||||
|
(junction (pt 336 1080))
|
||||||
|
(junction (pt 336 1032))
|
||||||
30
microprogram_adder/microprogram_adder.qpf
Normal file
30
microprogram_adder/microprogram_adder.qpf
Normal file
@ -0,0 +1,30 @@
|
|||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
# Your use of Altera Corporation's design tools, logic functions
|
||||||
|
# and other software and tools, and its AMPP partner logic
|
||||||
|
# functions, and any output files from any of the foregoing
|
||||||
|
# (including device programming or simulation files), and any
|
||||||
|
# associated documentation or information are expressly subject
|
||||||
|
# to the terms and conditions of the Altera Program License
|
||||||
|
# Subscription Agreement, Altera MegaCore Function License
|
||||||
|
# Agreement, or other applicable license agreement, including,
|
||||||
|
# without limitation, that your use is for the sole purpose of
|
||||||
|
# programming logic devices manufactured by Altera and sold by
|
||||||
|
# Altera or its authorized distributors. Please refer to the
|
||||||
|
# applicable agreement for further details.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Quartus II
|
||||||
|
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||||
|
# Date created = 16:02:07 March 17, 2022
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
|
||||||
|
QUARTUS_VERSION = "9.0"
|
||||||
|
DATE = "16:02:07 March 17, 2022"
|
||||||
|
|
||||||
|
# Revisions
|
||||||
|
|
||||||
|
PROJECT_REVISION = "microprogram_adder"
|
||||||
47
microprogram_adder/microprogram_adder.qsf
Normal file
47
microprogram_adder/microprogram_adder.qsf
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
# Your use of Altera Corporation's design tools, logic functions
|
||||||
|
# and other software and tools, and its AMPP partner logic
|
||||||
|
# functions, and any output files from any of the foregoing
|
||||||
|
# (including device programming or simulation files), and any
|
||||||
|
# associated documentation or information are expressly subject
|
||||||
|
# to the terms and conditions of the Altera Program License
|
||||||
|
# Subscription Agreement, Altera MegaCore Function License
|
||||||
|
# Agreement, or other applicable license agreement, including,
|
||||||
|
# without limitation, that your use is for the sole purpose of
|
||||||
|
# programming logic devices manufactured by Altera and sold by
|
||||||
|
# Altera or its authorized distributors. Please refer to the
|
||||||
|
# applicable agreement for further details.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Quartus II
|
||||||
|
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||||
|
# Date created = 16:02:07 March 17, 2022
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Notes:
|
||||||
|
#
|
||||||
|
# 1) The default values for assignments are stored in the file:
|
||||||
|
# microprogram_adder_assignment_defaults.qdf
|
||||||
|
# If this file doesn't exist, see file:
|
||||||
|
# assignment_defaults.qdf
|
||||||
|
#
|
||||||
|
# 2) Altera recommends that you do not modify this file. This
|
||||||
|
# file is updated automatically by the Quartus II software
|
||||||
|
# and any changes you make may be lost or overwritten.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
|
||||||
|
|
||||||
|
set_global_assignment -name FAMILY "Cyclone II"
|
||||||
|
set_global_assignment -name DEVICE EP2C8Q208C8
|
||||||
|
set_global_assignment -name TOP_LEVEL_ENTITY microprogram_adder
|
||||||
|
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
|
||||||
|
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:02:07 MARCH 17, 2022"
|
||||||
|
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
|
||||||
|
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
|
||||||
|
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||||
|
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||||
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