assign pins for microprogram_adder

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juzeon 2022-03-17 17:00:20 +08:00
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@ -120,3 +120,12 @@ K10: CLR
LR0~LR7: Q0~Q7
```
### microprogram_adder
```
K0: CLR
uIR0~uIR2: CPR0~CPR2
uIR3~uIR10: uA0~uA7
Q0~Q7: LR0~LR7
```

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@ -0,0 +1,211 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
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@ -0,0 +1,211 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
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@ -102,89 +102,9 @@ applicable agreement for further details.
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(text "uA0" (rect 5 0 23 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 92 12)(pt 117 12)(line_width 1))
@ -356,38 +356,6 @@ applicable agreement for further details.
(line (pt 78 12)(pt 82 8)(line_width 1))
)
)
(pin
(output)
(rect 360 984 536 1000)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "CP¦ÌIR" (rect 90 0 123 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8)(line_width 1))
(line (pt 52 4)(pt 78 4)(line_width 1))
(line (pt 52 12)(pt 78 12)(line_width 1))
(line (pt 52 12)(pt 52 4)(line_width 1))
(line (pt 78 4)(pt 82 8)(line_width 1))
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
)
(pin
(output)
(rect 360 1024 536 1040)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "¦ÌRD" (rect 90 0 112 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8)(line_width 1))
(line (pt 52 4)(pt 78 4)(line_width 1))
(line (pt 52 12)(pt 78 12)(line_width 1))
(line (pt 52 12)(pt 52 4)(line_width 1))
(line (pt 78 4)(pt 82 8)(line_width 1))
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
)
(pin
(output)
(rect 1176 704 1352 720)
@ -516,6 +484,38 @@ applicable agreement for further details.
(line (pt 78 12)(pt 82 8)(line_width 1))
)
)
(pin
(output)
(rect 360 1024 536 1040)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "uRD" (rect 90 0 112 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8)(line_width 1))
(line (pt 52 4)(pt 78 4)(line_width 1))
(line (pt 52 12)(pt 78 12)(line_width 1))
(line (pt 52 12)(pt 52 4)(line_width 1))
(line (pt 78 4)(pt 82 8)(line_width 1))
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
)
(pin
(output)
(rect 360 984 536 1000)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "CPuIR" (rect 90 0 123 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8)(line_width 1))
(line (pt 52 4)(pt 78 4)(line_width 1))
(line (pt 52 12)(pt 78 12)(line_width 1))
(line (pt 52 12)(pt 52 4)(line_width 1))
(line (pt 78 4)(pt 82 8)(line_width 1))
(line (pt 82 8)(pt 78 12)(line_width 1))
(line (pt 78 12)(pt 82 8)(line_width 1))
)
)
(symbol
(rect 224 768 320 992)
(text "counter_8b_with_input" (rect 5 0 135 14)(font "Arial" (font_size 8)))

查看文件

@ -0,0 +1,12 @@
<?xml version="1.0" encoding="UTF-8"?>
<pin_planner>
<pin_info>
</pin_info>
<buses>
</buses>
<group_file_association>
</group_file_association>
<pin_planner_file_specifies>
</pin_planner_file_specifies>
</pin_planner>

查看文件

@ -44,4 +44,44 @@ set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:02:07 MARCH 17, 2022
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name BDF_FILE microprogram_adder.bdf
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_180 -to A0
set_location_assignment PIN_181 -to A1
set_location_assignment PIN_182 -to A2
set_location_assignment PIN_185 -to A3
set_location_assignment PIN_187 -to A4
set_location_assignment PIN_188 -to A5
set_location_assignment PIN_189 -to A6
set_location_assignment PIN_191 -to A7
set_location_assignment PIN_77 -to CLR
set_location_assignment PIN_89 -to CPR0
set_location_assignment PIN_90 -to CPR1
set_location_assignment PIN_92 -to CPR2
set_location_assignment PIN_61 -to CPuIR
set_location_assignment PIN_132 -to P
set_location_assignment PIN_142 -to Q0
set_location_assignment PIN_143 -to Q1
set_location_assignment PIN_144 -to Q2
set_location_assignment PIN_145 -to Q3
set_location_assignment PIN_146 -to Q4
set_location_assignment PIN_147 -to Q5
set_location_assignment PIN_149 -to Q6
set_location_assignment PIN_150 -to Q7
set_location_assignment PIN_94 -to uA0
set_location_assignment PIN_95 -to uA1
set_location_assignment PIN_96 -to uA2
set_location_assignment PIN_97 -to uA3
set_location_assignment PIN_99 -to uA4
set_location_assignment PIN_101 -to uA5
set_location_assignment PIN_102 -to uA6
set_location_assignment PIN_103 -to uA7
set_location_assignment PIN_60 -to uRD