add test_MDR
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vendored
@ -49,3 +49,5 @@
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**/PLLJ_PLLSPE_INFO.txt # The generated PLL specification file
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**/PLLJ_PLLSPE_INFO.txt # The generated PLL specification file
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||||||
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||||||
~$*
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~$*
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||||||
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machine_alpha/folderhighlight-c9e654c8-5e1c-4d2b-a086-fae9f3219630.ico
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machine_alpha/desktop.ini
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||||||
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|||||||
1671
test_MDR/MDR_8b.bdf
Normal file
1671
test_MDR/MDR_8b.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
218
test_MDR/MDR_8b.bsf
Normal file
218
test_MDR/MDR_8b.bsf
Normal file
@ -0,0 +1,218 @@
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/*
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||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
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||||||
|
editor if you plan to continue editing the block that represents it in
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||||||
|
the Block Editor! File corruption is VERY likely to occur.
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||||||
|
*/
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||||||
|
/*
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||||||
|
Copyright (C) 1991-2009 Altera Corporation
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||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
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||||||
|
*/
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||||||
|
(header "symbol" (version "1.1"))
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||||||
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(symbol
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||||||
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(text "MDR_8b" (rect 5 0 52 14)(font "Arial" (font_size 8)))
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|
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||||||
1791
test_MDR/double_selector_8b.bdf
Normal file
1791
test_MDR/double_selector_8b.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
211
test_MDR/double_selector_8b.bsf
Normal file
211
test_MDR/double_selector_8b.bsf
Normal file
@ -0,0 +1,211 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
(header "symbol" (version "1.1"))
|
||||||
|
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||||||
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|
||||||
|
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||||||
|
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|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
(text "b3" (rect 21 219 35 233)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 224)(pt 16 224)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 208)
|
||||||
|
(input)
|
||||||
|
(text "b4" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b4" (rect 21 203 35 217)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 208)(pt 16 208)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 192)
|
||||||
|
(input)
|
||||||
|
(text "b5" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b5" (rect 21 187 35 201)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 192)(pt 16 192)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 176)
|
||||||
|
(input)
|
||||||
|
(text "b6" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b6" (rect 21 171 35 185)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 176)(pt 16 176)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 160)
|
||||||
|
(input)
|
||||||
|
(text "b7" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b7" (rect 21 155 35 169)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 160)(pt 16 160)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 288)
|
||||||
|
(input)
|
||||||
|
(text "AY" (rect 0 0 18 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "AY" (rect 21 283 39 297)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 288)(pt 16 288)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 304)
|
||||||
|
(input)
|
||||||
|
(text "BY" (rect 0 0 17 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "BY" (rect 21 299 38 313)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 304)(pt 16 304)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 144)
|
||||||
|
(output)
|
||||||
|
(text "Y0" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y0" (rect 59 139 75 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 144)(pt 80 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 128)
|
||||||
|
(output)
|
||||||
|
(text "Y1" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y1" (rect 59 123 75 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 128)(pt 80 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 112)
|
||||||
|
(output)
|
||||||
|
(text "Y2" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y2" (rect 59 107 75 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 112)(pt 80 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 96)
|
||||||
|
(output)
|
||||||
|
(text "Y3" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y3" (rect 59 91 75 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 96)(pt 80 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 80)
|
||||||
|
(output)
|
||||||
|
(text "Y4" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y4" (rect 59 75 75 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 80)(pt 80 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 64)
|
||||||
|
(output)
|
||||||
|
(text "Y5" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y5" (rect 59 59 75 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 64)(pt 80 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 48)
|
||||||
|
(output)
|
||||||
|
(text "Y6" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y6" (rect 59 43 75 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 48)(pt 80 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 32)
|
||||||
|
(output)
|
||||||
|
(text "Y7" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y7" (rect 59 27 75 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 32)(pt 80 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(rectangle (rect 16 16 80 336)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
1004
test_MDR/register_8b.bdf
Normal file
1004
test_MDR/register_8b.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
155
test_MDR/register_8b.bsf
Normal file
155
test_MDR/register_8b.bsf
Normal file
@ -0,0 +1,155 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
(header "symbol" (version "1.1"))
|
||||||
|
(symbol
|
||||||
|
(rect 16 16 112 240)
|
||||||
|
(text "register_8b" (rect 5 0 69 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "inst" (rect 8 208 25 220)(font "Arial" ))
|
||||||
|
(port
|
||||||
|
(pt 0 32)
|
||||||
|
(input)
|
||||||
|
(text "CLR" (rect 0 0 23 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CLR" (rect 21 27 44 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 32)(pt 16 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 48)
|
||||||
|
(input)
|
||||||
|
(text "CP" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CP" (rect 21 43 36 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 48)(pt 16 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 64)
|
||||||
|
(input)
|
||||||
|
(text "D7" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D7" (rect 21 59 36 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 64)(pt 16 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 80)
|
||||||
|
(input)
|
||||||
|
(text "D6" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D6" (rect 21 75 36 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 80)(pt 16 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 96)
|
||||||
|
(input)
|
||||||
|
(text "D5" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D5" (rect 21 91 36 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 96)(pt 16 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 112)
|
||||||
|
(input)
|
||||||
|
(text "D4" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D4" (rect 21 107 36 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 112)(pt 16 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 128)
|
||||||
|
(input)
|
||||||
|
(text "D3" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D3" (rect 21 123 36 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 128)(pt 16 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 144)
|
||||||
|
(input)
|
||||||
|
(text "D2" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D2" (rect 21 139 36 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 144)(pt 16 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 160)
|
||||||
|
(input)
|
||||||
|
(text "D1" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D1" (rect 21 155 36 169)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 160)(pt 16 160)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 176)
|
||||||
|
(input)
|
||||||
|
(text "D0" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D0" (rect 21 171 36 185)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 176)(pt 16 176)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 32)
|
||||||
|
(output)
|
||||||
|
(text "Q7" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q7" (rect 59 27 75 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 32)(pt 80 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 48)
|
||||||
|
(output)
|
||||||
|
(text "Q6" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q6" (rect 59 43 75 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 48)(pt 80 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 64)
|
||||||
|
(output)
|
||||||
|
(text "Q5" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q5" (rect 59 59 75 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 64)(pt 80 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 80)
|
||||||
|
(output)
|
||||||
|
(text "Q4" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q4" (rect 59 75 75 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 80)(pt 80 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 96)
|
||||||
|
(output)
|
||||||
|
(text "Q3" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q3" (rect 59 91 75 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 96)(pt 80 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 112)
|
||||||
|
(output)
|
||||||
|
(text "Q2" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q2" (rect 59 107 75 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 112)(pt 80 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 128)
|
||||||
|
(output)
|
||||||
|
(text "Q1" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q1" (rect 59 123 75 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 128)(pt 80 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 144)
|
||||||
|
(output)
|
||||||
|
(text "Q0" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q0" (rect 59 139 75 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 144)(pt 80 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(rectangle (rect 16 16 80 208)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
767
test_MDR/test_MDR.bdf
Normal file
767
test_MDR/test_MDR.bdf
Normal file
@ -0,0 +1,767 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
//#pragma file_not_in_maxplusii_format
|
||||||
|
(header "graphic" (version "1.3"))
|
||||||
|
(pin
|
||||||
|
(input)
|
||||||
|
(rect 640 504 808 520)
|
||||||
|
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
|
||||||
|
(text "Z0" (rect 5 0 17 12)(font "Arial" ))
|
||||||
|
(pt 168 8)
|
||||||
|
(drawing
|
||||||
|
(line (pt 92 12)(pt 117 12)(line_width 1))
|
||||||
|
(line (pt 92 4)(pt 117 4)(line_width 1))
|
||||||
|
(line (pt 121 8)(pt 168 8)(line_width 1))
|
||||||
|
(line (pt 92 12)(pt 92 4)(line_width 1))
|
||||||
|
(line (pt 117 4)(pt 121 8)(line_width 1))
|
||||||
|
(line (pt 117 12)(pt 121 8)(line_width 1))
|
||||||
|
)
|
||||||
|
(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
|
||||||
|
)
|
||||||
|
(pin
|
||||||
|
(input)
|
||||||
|
(rect 640 488 808 504)
|
||||||
|
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
|
||||||
|
(text "Z1" (rect 5 0 17 12)(font "Arial" ))
|
||||||
|
(pt 168 8)
|
||||||
|
(drawing
|
||||||
|
(line (pt 92 12)(pt 117 12)(line_width 1))
|
||||||
|
(line (pt 92 4)(pt 117 4)(line_width 1))
|
||||||
|
(line (pt 121 8)(pt 168 8)(line_width 1))
|
||||||
|
(line (pt 92 12)(pt 92 4)(line_width 1))
|
||||||
|
(line (pt 117 4)(pt 121 8)(line_width 1))
|
||||||
|
(line (pt 117 12)(pt 121 8)(line_width 1))
|
||||||
|
)
|
||||||
|
(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
|
||||||
|
)
|
||||||
|
(pin
|
||||||
|
(input)
|
||||||
|
(rect 640 472 808 488)
|
||||||
|
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
|
||||||
|
(text "Z2" (rect 5 0 17 12)(font "Arial" ))
|
||||||
|
(pt 168 8)
|
||||||
|
(drawing
|
||||||
|
(line (pt 92 12)(pt 117 12)(line_width 1))
|
||||||
|
(line (pt 92 4)(pt 117 4)(line_width 1))
|
||||||
|
(line (pt 121 8)(pt 168 8)(line_width 1))
|
||||||
|
(line (pt 92 12)(pt 92 4)(line_width 1))
|
||||||
|
(line (pt 117 4)(pt 121 8)(line_width 1))
|
||||||
|
(line (pt 117 12)(pt 121 8)(line_width 1))
|
||||||
|
)
|
||||||
|
(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
|
||||||
|
)
|
||||||
|
(pin
|
||||||
|
(input)
|
||||||
|
(rect 640 456 808 472)
|
||||||
|
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
|
||||||
|
(text "Z3" (rect 5 0 17 12)(font "Arial" ))
|
||||||
|
(pt 168 8)
|
||||||
|
(drawing
|
||||||
|
(line (pt 92 12)(pt 117 12)(line_width 1))
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(line (pt 52 8)(pt 56 12)(line_width 1))
|
||||||
|
)
|
||||||
|
(text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
|
||||||
|
)
|
||||||
|
(pin
|
||||||
|
(bidir)
|
||||||
|
(rect 1168 392 1344 408)
|
||||||
|
(text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
|
||||||
|
(text "RAM7" (rect 90 0 119 12)(font "Arial" ))
|
||||||
|
(pt 0 8)
|
||||||
|
(drawing
|
||||||
|
(line (pt 56 4)(pt 78 4)(line_width 1))
|
||||||
|
(line (pt 0 8)(pt 52 8)(line_width 1))
|
||||||
|
(line (pt 56 12)(pt 78 12)(line_width 1))
|
||||||
|
(line (pt 78 4)(pt 82 8)(line_width 1))
|
||||||
|
(line (pt 78 12)(pt 82 8)(line_width 1))
|
||||||
|
(line (pt 56 4)(pt 52 8)(line_width 1))
|
||||||
|
(line (pt 52 8)(pt 56 12)(line_width 1))
|
||||||
|
)
|
||||||
|
(text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
|
||||||
|
)
|
||||||
|
(symbol
|
||||||
|
(rect 880 320 1056 560)
|
||||||
|
(text "MDR_8b" (rect 5 0 52 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "inst" (rect 8 224 25 236)(font "Arial" ))
|
||||||
|
(port
|
||||||
|
(pt 0 48)
|
||||||
|
(input)
|
||||||
|
(text "CLR" (rect 0 0 23 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CLR" (rect 21 43 44 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 48)(pt 16 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 64)
|
||||||
|
(input)
|
||||||
|
(text "CP" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CP" (rect 21 59 36 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 64)(pt 16 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 80)
|
||||||
|
(input)
|
||||||
|
(text "D7" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D7" (rect 21 75 36 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 80)(pt 16 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 96)
|
||||||
|
(input)
|
||||||
|
(text "D6" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D6" (rect 21 91 36 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 96)(pt 16 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 112)
|
||||||
|
(input)
|
||||||
|
(text "D5" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D5" (rect 21 107 36 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 112)(pt 16 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 128)
|
||||||
|
(input)
|
||||||
|
(text "D4" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D4" (rect 21 123 36 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 128)(pt 16 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 144)
|
||||||
|
(input)
|
||||||
|
(text "D3" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D3" (rect 21 139 36 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 144)(pt 16 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 160)
|
||||||
|
(input)
|
||||||
|
(text "D2" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D2" (rect 21 155 36 169)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 160)(pt 16 160)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 176)
|
||||||
|
(input)
|
||||||
|
(text "D1" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D1" (rect 21 171 36 185)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 176)(pt 16 176)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 192)
|
||||||
|
(input)
|
||||||
|
(text "D0" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D0" (rect 21 187 36 201)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 192)(pt 16 192)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 208)
|
||||||
|
(input)
|
||||||
|
(text "1BUS2MDR" (rect 0 0 64 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "1BUS2MDR" (rect 21 203 85 217)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 208)(pt 16 208)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 32 0)
|
||||||
|
(output)
|
||||||
|
(text "Q7" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q7" (rect 24 24 38 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 32 0)(pt 32 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 48 0)
|
||||||
|
(output)
|
||||||
|
(text "Q6" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q6" (rect 40 24 54 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 48 0)(pt 48 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 64 0)
|
||||||
|
(output)
|
||||||
|
(text "Q5" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q5" (rect 56 24 70 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 64 0)(pt 64 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 80 0)
|
||||||
|
(output)
|
||||||
|
(text "Q4" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q4" (rect 72 24 86 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 80 0)(pt 80 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 0)
|
||||||
|
(output)
|
||||||
|
(text "Q3" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q3" (rect 88 24 102 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 96 0)(pt 96 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 112 0)
|
||||||
|
(output)
|
||||||
|
(text "Q2" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q2" (rect 104 24 118 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 112 0)(pt 112 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 128 0)
|
||||||
|
(output)
|
||||||
|
(text "Q1" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q1" (rect 120 24 134 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 128 0)(pt 128 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 144 0)
|
||||||
|
(output)
|
||||||
|
(text "Q0" (rect 208 0 224 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q0" (rect 136 24 150 40)(font "Arial" (font_size 8))(vertical))
|
||||||
|
(line (pt 144 0)(pt 144 16)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 80)
|
||||||
|
(bidir)
|
||||||
|
(text "M7" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M7" (rect 139 75 155 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 80)(pt 160 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 96)
|
||||||
|
(bidir)
|
||||||
|
(text "M6" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M6" (rect 139 91 155 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 96)(pt 160 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 112)
|
||||||
|
(bidir)
|
||||||
|
(text "M5" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M5" (rect 139 107 155 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 112)(pt 160 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 128)
|
||||||
|
(bidir)
|
||||||
|
(text "M4" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M4" (rect 139 123 155 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 128)(pt 160 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 144)
|
||||||
|
(bidir)
|
||||||
|
(text "M3" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M3" (rect 139 139 155 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 144)(pt 160 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 160)
|
||||||
|
(bidir)
|
||||||
|
(text "M2" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M2" (rect 139 155 155 169)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 160)(pt 160 160)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 176)
|
||||||
|
(bidir)
|
||||||
|
(text "M1" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M1" (rect 139 171 155 185)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 176)(pt 160 176)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 176 192)
|
||||||
|
(bidir)
|
||||||
|
(text "M0" (rect 56 0 72 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "M0" (rect 139 187 155 201)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 176 192)(pt 160 192)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(rectangle (rect 16 16 160 224)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 400)
|
||||||
|
(pt 1168 400)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 416)
|
||||||
|
(pt 1168 416)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 432)
|
||||||
|
(pt 1168 432)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 448)
|
||||||
|
(pt 1168 448)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 464)
|
||||||
|
(pt 1168 464)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 480)
|
||||||
|
(pt 1168 480)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 496)
|
||||||
|
(pt 1168 496)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1056 512)
|
||||||
|
(pt 1168 512)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 512)
|
||||||
|
(pt 880 512)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 496)
|
||||||
|
(pt 880 496)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 480)
|
||||||
|
(pt 880 480)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 464)
|
||||||
|
(pt 880 464)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 448)
|
||||||
|
(pt 880 448)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 432)
|
||||||
|
(pt 880 432)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 416)
|
||||||
|
(pt 880 416)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 808 400)
|
||||||
|
(pt 880 400)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 784 576)
|
||||||
|
(pt 856 576)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 856 576)
|
||||||
|
(pt 856 528)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 856 528)
|
||||||
|
(pt 880 528)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1024 320)
|
||||||
|
(pt 1024 288)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1024 288)
|
||||||
|
(pt 1168 288)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1008 320)
|
||||||
|
(pt 1008 272)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 1008 272)
|
||||||
|
(pt 1168 272)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 992 320)
|
||||||
|
(pt 992 256)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 992 256)
|
||||||
|
(pt 1168 256)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 976 320)
|
||||||
|
(pt 976 240)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 976 240)
|
||||||
|
(pt 1168 240)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 960 320)
|
||||||
|
(pt 960 224)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 960 224)
|
||||||
|
(pt 1168 224)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 944 320)
|
||||||
|
(pt 944 208)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 944 208)
|
||||||
|
(pt 1168 208)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 928 320)
|
||||||
|
(pt 928 192)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 928 192)
|
||||||
|
(pt 1168 192)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 912 320)
|
||||||
|
(pt 912 176)
|
||||||
|
)
|
||||||
|
(connector
|
||||||
|
(pt 912 176)
|
||||||
|
(pt 1168 176)
|
||||||
|
)
|
||||||
12
test_MDR/test_MDR.dpf
Normal file
12
test_MDR/test_MDR.dpf
Normal file
@ -0,0 +1,12 @@
|
|||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
|
||||||
|
<pin_planner>
|
||||||
|
<pin_info>
|
||||||
|
</pin_info>
|
||||||
|
<buses>
|
||||||
|
</buses>
|
||||||
|
<group_file_association>
|
||||||
|
</group_file_association>
|
||||||
|
<pin_planner_file_specifies>
|
||||||
|
</pin_planner_file_specifies>
|
||||||
|
</pin_planner>
|
||||||
30
test_MDR/test_MDR.qpf
Normal file
30
test_MDR/test_MDR.qpf
Normal file
@ -0,0 +1,30 @@
|
|||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
# Your use of Altera Corporation's design tools, logic functions
|
||||||
|
# and other software and tools, and its AMPP partner logic
|
||||||
|
# functions, and any output files from any of the foregoing
|
||||||
|
# (including device programming or simulation files), and any
|
||||||
|
# associated documentation or information are expressly subject
|
||||||
|
# to the terms and conditions of the Altera Program License
|
||||||
|
# Subscription Agreement, Altera MegaCore Function License
|
||||||
|
# Agreement, or other applicable license agreement, including,
|
||||||
|
# without limitation, that your use is for the sole purpose of
|
||||||
|
# programming logic devices manufactured by Altera and sold by
|
||||||
|
# Altera or its authorized distributors. Please refer to the
|
||||||
|
# applicable agreement for further details.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Quartus II
|
||||||
|
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||||
|
# Date created = 19:33:16 May 18, 2022
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
|
||||||
|
QUARTUS_VERSION = "9.0"
|
||||||
|
DATE = "19:33:16 May 18, 2022"
|
||||||
|
|
||||||
|
# Revisions
|
||||||
|
|
||||||
|
PROJECT_REVISION = "test_MDR"
|
||||||
79
test_MDR/test_MDR.qsf
Normal file
79
test_MDR/test_MDR.qsf
Normal file
@ -0,0 +1,79 @@
|
|||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
# Your use of Altera Corporation's design tools, logic functions
|
||||||
|
# and other software and tools, and its AMPP partner logic
|
||||||
|
# functions, and any output files from any of the foregoing
|
||||||
|
# (including device programming or simulation files), and any
|
||||||
|
# associated documentation or information are expressly subject
|
||||||
|
# to the terms and conditions of the Altera Program License
|
||||||
|
# Subscription Agreement, Altera MegaCore Function License
|
||||||
|
# Agreement, or other applicable license agreement, including,
|
||||||
|
# without limitation, that your use is for the sole purpose of
|
||||||
|
# programming logic devices manufactured by Altera and sold by
|
||||||
|
# Altera or its authorized distributors. Please refer to the
|
||||||
|
# applicable agreement for further details.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Quartus II
|
||||||
|
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||||
|
# Date created = 19:33:16 May 18, 2022
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Notes:
|
||||||
|
#
|
||||||
|
# 1) The default values for assignments are stored in the file:
|
||||||
|
# test_MDR_assignment_defaults.qdf
|
||||||
|
# If this file doesn't exist, see file:
|
||||||
|
# assignment_defaults.qdf
|
||||||
|
#
|
||||||
|
# 2) Altera recommends that you do not modify this file. This
|
||||||
|
# file is updated automatically by the Quartus II software
|
||||||
|
# and any changes you make may be lost or overwritten.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
|
||||||
|
|
||||||
|
set_global_assignment -name FAMILY "Cyclone II"
|
||||||
|
set_global_assignment -name DEVICE EP2C8Q208C8
|
||||||
|
set_global_assignment -name TOP_LEVEL_ENTITY test_MDR
|
||||||
|
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
|
||||||
|
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:33:16 MAY 18, 2022"
|
||||||
|
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
|
||||||
|
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
|
||||||
|
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||||
|
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||||
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||||
|
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||||
|
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||||
|
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
|
||||||
|
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
|
||||||
|
set_global_assignment -name BDF_FILE test_MDR.bdf
|
||||||
|
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
|
||||||
|
set_location_assignment PIN_67 -to 1BUS2MDR
|
||||||
|
set_location_assignment PIN_77 -to Z0
|
||||||
|
set_location_assignment PIN_80 -to Z1
|
||||||
|
set_location_assignment PIN_81 -to Z2
|
||||||
|
set_location_assignment PIN_82 -to Z3
|
||||||
|
set_location_assignment PIN_84 -to Z4
|
||||||
|
set_location_assignment PIN_86 -to Z5
|
||||||
|
set_location_assignment PIN_87 -to Z6
|
||||||
|
set_location_assignment PIN_88 -to Z7
|
||||||
|
set_location_assignment PIN_142 -to MDR0
|
||||||
|
set_location_assignment PIN_143 -to MDR1
|
||||||
|
set_location_assignment PIN_144 -to MDR2
|
||||||
|
set_location_assignment PIN_145 -to MDR3
|
||||||
|
set_location_assignment PIN_146 -to MDR4
|
||||||
|
set_location_assignment PIN_147 -to MDR5
|
||||||
|
set_location_assignment PIN_149 -to MDR6
|
||||||
|
set_location_assignment PIN_150 -to MDR7
|
||||||
|
set_location_assignment PIN_168 -to RAM0
|
||||||
|
set_location_assignment PIN_169 -to RAM1
|
||||||
|
set_location_assignment PIN_170 -to RAM2
|
||||||
|
set_location_assignment PIN_171 -to RAM3
|
||||||
|
set_location_assignment PIN_173 -to RAM4
|
||||||
|
set_location_assignment PIN_175 -to RAM5
|
||||||
|
set_location_assignment PIN_176 -to RAM6
|
||||||
|
set_location_assignment PIN_179 -to RAM7
|
||||||
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