为ALU添加了无符号加法
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@ -135,3 +135,4 @@ set_location_assignment PIN_114 -to uIR18
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set_location_assignment PIN_115 -to uIR19
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set_instance_assignment -name NOT_A_CLOCK ON -to uIR8
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set_instance_assignment -name NOT_A_CLOCK ON -to uIR9
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set_global_assignment -name BDF_FILE nano_selector.bdf
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273
machine_alpha/nano_selector.bdf
Normal file
273
machine_alpha/nano_selector.bdf
Normal file
@ -0,0 +1,273 @@
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/*
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||||
WARNING: Do NOT edit the input and output ports in this file in a text
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||||
editor if you plan to continue editing the block that represents it in
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||||
the Block Editor! File corruption is VERY likely to occur.
|
||||
*/
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||||
/*
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||||
Copyright (C) 1991-2009 Altera Corporation
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||||
Your use of Altera Corporation's design tools, logic functions
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||||
and other software and tools, and its AMPP partner logic
|
||||
functions, and any output files from any of the foregoing
|
||||
(including device programming or simulation files), and any
|
||||
associated documentation or information are expressly subject
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||||
to the terms and conditions of the Altera Program License
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||||
Subscription Agreement, Altera MegaCore Function License
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||||
Agreement, or other applicable license agreement, including,
|
||||
without limitation, that your use is for the sole purpose of
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||||
programming logic devices manufactured by Altera and sold by
|
||||
Altera or its authorized distributors. Please refer to the
|
||||
applicable agreement for further details.
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||||
*/
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||||
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|
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|
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|
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|
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||||
(junction (pt 544 248))
|
57
machine_alpha/nano_selector.bsf
Normal file
57
machine_alpha/nano_selector.bsf
Normal file
@ -0,0 +1,57 @@
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||||
/*
|
||||
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||
editor if you plan to continue editing the block that represents it in
|
||||
the Block Editor! File corruption is VERY likely to occur.
|
||||
*/
|
||||
/*
|
||||
Copyright (C) 1991-2009 Altera Corporation
|
||||
Your use of Altera Corporation's design tools, logic functions
|
||||
and other software and tools, and its AMPP partner logic
|
||||
functions, and any output files from any of the foregoing
|
||||
(including device programming or simulation files), and any
|
||||
associated documentation or information are expressly subject
|
||||
to the terms and conditions of the Altera Program License
|
||||
Subscription Agreement, Altera MegaCore Function License
|
||||
Agreement, or other applicable license agreement, including,
|
||||
without limitation, that your use is for the sole purpose of
|
||||
programming logic devices manufactured by Altera and sold by
|
||||
Altera or its authorized distributors. Please refer to the
|
||||
applicable agreement for further details.
|
||||
*/
|
||||
(header "symbol" (version "1.1"))
|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
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|
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|
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|
||||
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|
||||
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|
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|
||||
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||||
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|
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|
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|
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||||
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|
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|
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)
|
||||
)
|
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