create microprogram_ram
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2906
microprogram_ram/adder_8b.bdf
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2906
microprogram_ram/adder_8b.bdf
Normal file
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microprogram_ram/adder_8b.bsf
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211
microprogram_ram/adder_8b.bsf
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/*
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||||||
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WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
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||||||
|
/*
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||||||
|
Copyright (C) 1991-2009 Altera Corporation
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||||||
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Your use of Altera Corporation's design tools, logic functions
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||||||
|
and other software and tools, and its AMPP partner logic
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||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
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||||||
|
*/
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||||||
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(header "symbol" (version "1.1"))
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|
)
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||||||
1375
microprogram_ram/counter_8b_with_input.bdf
Normal file
1375
microprogram_ram/counter_8b_with_input.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
162
microprogram_ram/counter_8b_with_input.bsf
Normal file
162
microprogram_ram/counter_8b_with_input.bsf
Normal file
@ -0,0 +1,162 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
(header "symbol" (version "1.1"))
|
||||||
|
(symbol
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||||||
|
(rect 16 16 112 240)
|
||||||
|
(text "counter_8b_with_input" (rect 5 0 135 14)(font "Arial" (font_size 8)))
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||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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)
|
||||||
|
(port
|
||||||
|
(pt 96 80)
|
||||||
|
(output)
|
||||||
|
(text "Q4" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q4" (rect 59 75 75 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 80)(pt 80 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 96)
|
||||||
|
(output)
|
||||||
|
(text "Q3" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q3" (rect 59 91 75 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 96)(pt 80 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 112)
|
||||||
|
(output)
|
||||||
|
(text "Q2" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q2" (rect 59 107 75 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 112)(pt 80 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 128)
|
||||||
|
(output)
|
||||||
|
(text "Q1" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q1" (rect 59 123 75 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 128)(pt 80 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 144)
|
||||||
|
(output)
|
||||||
|
(text "Q0" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q0" (rect 59 139 75 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 144)(pt 80 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(rectangle (rect 16 16 80 208)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
1791
microprogram_ram/double_selector_8b.bdf
Normal file
1791
microprogram_ram/double_selector_8b.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
211
microprogram_ram/double_selector_8b.bsf
Normal file
211
microprogram_ram/double_selector_8b.bsf
Normal file
@ -0,0 +1,211 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
(header "symbol" (version "1.1"))
|
||||||
|
(symbol
|
||||||
|
(rect 64 64 160 416)
|
||||||
|
(text "double_selector_8b" (rect 5 0 117 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "inst" (rect 8 336 25 348)(font "Arial" ))
|
||||||
|
(port
|
||||||
|
(pt 0 144)
|
||||||
|
(input)
|
||||||
|
(text "a0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a0" (rect 21 136 35 150)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 144)(pt 16 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 128)
|
||||||
|
(input)
|
||||||
|
(text "a1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a1" (rect 21 120 35 134)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 128)(pt 16 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 112)
|
||||||
|
(input)
|
||||||
|
(text "a2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a2" (rect 21 104 35 118)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 112)(pt 16 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 96)
|
||||||
|
(input)
|
||||||
|
(text "a3" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a3" (rect 21 88 35 102)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 96)(pt 16 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 80)
|
||||||
|
(input)
|
||||||
|
(text "a4" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a4" (rect 21 72 35 86)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 80)(pt 16 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 64)
|
||||||
|
(input)
|
||||||
|
(text "a5" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a5" (rect 21 56 35 70)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 64)(pt 16 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 48)
|
||||||
|
(input)
|
||||||
|
(text "a6" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a6" (rect 21 40 35 54)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 48)(pt 16 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 32)
|
||||||
|
(input)
|
||||||
|
(text "a7" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "a7" (rect 21 24 35 38)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 32)(pt 16 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 272)
|
||||||
|
(input)
|
||||||
|
(text "b0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b0" (rect 21 267 35 281)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 272)(pt 16 272)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 256)
|
||||||
|
(input)
|
||||||
|
(text "b1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b1" (rect 21 251 35 265)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 256)(pt 16 256)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 240)
|
||||||
|
(input)
|
||||||
|
(text "b2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b2" (rect 21 235 35 249)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 240)(pt 16 240)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 224)
|
||||||
|
(input)
|
||||||
|
(text "b3" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b3" (rect 21 219 35 233)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 224)(pt 16 224)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 208)
|
||||||
|
(input)
|
||||||
|
(text "b4" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b4" (rect 21 203 35 217)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 208)(pt 16 208)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 192)
|
||||||
|
(input)
|
||||||
|
(text "b5" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b5" (rect 21 187 35 201)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 192)(pt 16 192)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 176)
|
||||||
|
(input)
|
||||||
|
(text "b6" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b6" (rect 21 171 35 185)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 176)(pt 16 176)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 160)
|
||||||
|
(input)
|
||||||
|
(text "b7" (rect 0 0 14 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "b7" (rect 21 155 35 169)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 160)(pt 16 160)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 288)
|
||||||
|
(input)
|
||||||
|
(text "AY" (rect 0 0 18 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "AY" (rect 21 283 39 297)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 288)(pt 16 288)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 304)
|
||||||
|
(input)
|
||||||
|
(text "BY" (rect 0 0 17 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "BY" (rect 21 299 38 313)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 304)(pt 16 304)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 144)
|
||||||
|
(output)
|
||||||
|
(text "Y0" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y0" (rect 59 139 75 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 144)(pt 80 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 128)
|
||||||
|
(output)
|
||||||
|
(text "Y1" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y1" (rect 59 123 75 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 128)(pt 80 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 112)
|
||||||
|
(output)
|
||||||
|
(text "Y2" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y2" (rect 59 107 75 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 112)(pt 80 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 96)
|
||||||
|
(output)
|
||||||
|
(text "Y3" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y3" (rect 59 91 75 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 96)(pt 80 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 80)
|
||||||
|
(output)
|
||||||
|
(text "Y4" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y4" (rect 59 75 75 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 80)(pt 80 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 64)
|
||||||
|
(output)
|
||||||
|
(text "Y5" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y5" (rect 59 59 75 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 64)(pt 80 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 48)
|
||||||
|
(output)
|
||||||
|
(text "Y6" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y6" (rect 59 43 75 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 48)(pt 80 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 32)
|
||||||
|
(output)
|
||||||
|
(text "Y7" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Y7" (rect 59 27 75 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 32)(pt 80 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(rectangle (rect 16 16 80 336)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
1499
microprogram_ram/microprogram_ram.bdf
Normal file
1499
microprogram_ram/microprogram_ram.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
30
microprogram_ram/microprogram_ram.qpf
Normal file
30
microprogram_ram/microprogram_ram.qpf
Normal file
@ -0,0 +1,30 @@
|
|||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
# Your use of Altera Corporation's design tools, logic functions
|
||||||
|
# and other software and tools, and its AMPP partner logic
|
||||||
|
# functions, and any output files from any of the foregoing
|
||||||
|
# (including device programming or simulation files), and any
|
||||||
|
# associated documentation or information are expressly subject
|
||||||
|
# to the terms and conditions of the Altera Program License
|
||||||
|
# Subscription Agreement, Altera MegaCore Function License
|
||||||
|
# Agreement, or other applicable license agreement, including,
|
||||||
|
# without limitation, that your use is for the sole purpose of
|
||||||
|
# programming logic devices manufactured by Altera and sold by
|
||||||
|
# Altera or its authorized distributors. Please refer to the
|
||||||
|
# applicable agreement for further details.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Quartus II
|
||||||
|
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||||
|
# Date created = 19:35:41 March 17, 2022
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
|
||||||
|
QUARTUS_VERSION = "9.0"
|
||||||
|
DATE = "19:35:41 March 17, 2022"
|
||||||
|
|
||||||
|
# Revisions
|
||||||
|
|
||||||
|
PROJECT_REVISION = "microprogram_ram"
|
||||||
47
microprogram_ram/microprogram_ram.qsf
Normal file
47
microprogram_ram/microprogram_ram.qsf
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
# Your use of Altera Corporation's design tools, logic functions
|
||||||
|
# and other software and tools, and its AMPP partner logic
|
||||||
|
# functions, and any output files from any of the foregoing
|
||||||
|
# (including device programming or simulation files), and any
|
||||||
|
# associated documentation or information are expressly subject
|
||||||
|
# to the terms and conditions of the Altera Program License
|
||||||
|
# Subscription Agreement, Altera MegaCore Function License
|
||||||
|
# Agreement, or other applicable license agreement, including,
|
||||||
|
# without limitation, that your use is for the sole purpose of
|
||||||
|
# programming logic devices manufactured by Altera and sold by
|
||||||
|
# Altera or its authorized distributors. Please refer to the
|
||||||
|
# applicable agreement for further details.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Quartus II
|
||||||
|
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||||
|
# Date created = 19:35:41 March 17, 2022
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
#
|
||||||
|
# Notes:
|
||||||
|
#
|
||||||
|
# 1) The default values for assignments are stored in the file:
|
||||||
|
# microprogram_ram_assignment_defaults.qdf
|
||||||
|
# If this file doesn't exist, see file:
|
||||||
|
# assignment_defaults.qdf
|
||||||
|
#
|
||||||
|
# 2) Altera recommends that you do not modify this file. This
|
||||||
|
# file is updated automatically by the Quartus II software
|
||||||
|
# and any changes you make may be lost or overwritten.
|
||||||
|
#
|
||||||
|
# -------------------------------------------------------------------------- #
|
||||||
|
|
||||||
|
|
||||||
|
set_global_assignment -name FAMILY "Cyclone II"
|
||||||
|
set_global_assignment -name DEVICE EP2C8Q208C8
|
||||||
|
set_global_assignment -name TOP_LEVEL_ENTITY microprogram_ram
|
||||||
|
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
|
||||||
|
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:35:41 MARCH 17, 2022"
|
||||||
|
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
|
||||||
|
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
|
||||||
|
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||||
|
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||||
1004
microprogram_ram/register_8b.bdf
Normal file
1004
microprogram_ram/register_8b.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
155
microprogram_ram/register_8b.bsf
Normal file
155
microprogram_ram/register_8b.bsf
Normal file
@ -0,0 +1,155 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
|
(line (pt 96 144)(pt 80 144)(line_width 1))
|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
)
|
||||||
1407
microprogram_ram/register_8b_with_switch.bdf
Normal file
1407
microprogram_ram/register_8b_with_switch.bdf
Normal file
檔案差異因為檔案過大而無法顯示
載入差異
162
microprogram_ram/register_8b_with_switch.bsf
Normal file
162
microprogram_ram/register_8b_with_switch.bsf
Normal file
@ -0,0 +1,162 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
(header "symbol" (version "1.1"))
|
||||||
|
(symbol
|
||||||
|
(rect 16 16 112 240)
|
||||||
|
(text "register_8b_with_switch" (rect 5 0 147 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "inst" (rect 8 208 25 220)(font "Arial" ))
|
||||||
|
(port
|
||||||
|
(pt 0 32)
|
||||||
|
(input)
|
||||||
|
(text "EN" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "EN" (rect 21 27 36 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 32)(pt 16 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 48)
|
||||||
|
(input)
|
||||||
|
(text "CLR" (rect 0 0 23 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CLR" (rect 21 43 44 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 48)(pt 16 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 64)
|
||||||
|
(input)
|
||||||
|
(text "CP" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CP" (rect 21 59 36 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 64)(pt 16 64)(line_width 1))
|
||||||
|
)
|
||||||
|
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|
||||||
|
(pt 0 80)
|
||||||
|
(input)
|
||||||
|
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|
||||||
|
(text "D7" (rect 21 75 36 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 80)(pt 16 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 96)
|
||||||
|
(input)
|
||||||
|
(text "D6" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D6" (rect 21 91 36 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 96)(pt 16 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 112)
|
||||||
|
(input)
|
||||||
|
(text "D5" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D5" (rect 21 107 36 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 112)(pt 16 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 128)
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
(line (pt 0 128)(pt 16 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 144)
|
||||||
|
(input)
|
||||||
|
(text "D3" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D3" (rect 21 139 36 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 144)(pt 16 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 160)
|
||||||
|
(input)
|
||||||
|
(text "D2" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D2" (rect 21 155 36 169)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 160)(pt 16 160)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 176)
|
||||||
|
(input)
|
||||||
|
(text "D1" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D1" (rect 21 171 36 185)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 176)(pt 16 176)(line_width 1))
|
||||||
|
)
|
||||||
|
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|
||||||
|
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|
||||||
|
(input)
|
||||||
|
(text "D0" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
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|
||||||
|
(line (pt 0 192)(pt 16 192)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 32)
|
||||||
|
(output)
|
||||||
|
(text "Q7" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q7" (rect 59 27 75 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 32)(pt 80 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 48)
|
||||||
|
(output)
|
||||||
|
(text "Q6" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q6" (rect 59 43 75 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 48)(pt 80 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 64)
|
||||||
|
(output)
|
||||||
|
(text "Q5" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q5" (rect 59 59 75 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 64)(pt 80 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 80)
|
||||||
|
(output)
|
||||||
|
(text "Q4" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q4" (rect 59 75 75 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 80)(pt 80 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 96)
|
||||||
|
(output)
|
||||||
|
(text "Q3" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q3" (rect 59 91 75 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 96)(pt 80 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 112)
|
||||||
|
(output)
|
||||||
|
(text "Q2" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q2" (rect 59 107 75 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 112)(pt 80 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 128)
|
||||||
|
(output)
|
||||||
|
(text "Q1" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q1" (rect 59 123 75 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 128)(pt 80 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 144)
|
||||||
|
(output)
|
||||||
|
(text "Q0" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q0" (rect 59 139 75 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 144)(pt 80 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(rectangle (rect 16 16 80 208)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
162
register_8b_with_switch/register_8b_with_switch.bsf
Normal file
162
register_8b_with_switch/register_8b_with_switch.bsf
Normal file
@ -0,0 +1,162 @@
|
|||||||
|
/*
|
||||||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||||
|
editor if you plan to continue editing the block that represents it in
|
||||||
|
the Block Editor! File corruption is VERY likely to occur.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
Copyright (C) 1991-2009 Altera Corporation
|
||||||
|
Your use of Altera Corporation's design tools, logic functions
|
||||||
|
and other software and tools, and its AMPP partner logic
|
||||||
|
functions, and any output files from any of the foregoing
|
||||||
|
(including device programming or simulation files), and any
|
||||||
|
associated documentation or information are expressly subject
|
||||||
|
to the terms and conditions of the Altera Program License
|
||||||
|
Subscription Agreement, Altera MegaCore Function License
|
||||||
|
Agreement, or other applicable license agreement, including,
|
||||||
|
without limitation, that your use is for the sole purpose of
|
||||||
|
programming logic devices manufactured by Altera and sold by
|
||||||
|
Altera or its authorized distributors. Please refer to the
|
||||||
|
applicable agreement for further details.
|
||||||
|
*/
|
||||||
|
(header "symbol" (version "1.1"))
|
||||||
|
(symbol
|
||||||
|
(rect 16 16 112 240)
|
||||||
|
(text "register_8b_with_switch" (rect 5 0 147 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "inst" (rect 8 208 25 220)(font "Arial" ))
|
||||||
|
(port
|
||||||
|
(pt 0 32)
|
||||||
|
(input)
|
||||||
|
(text "EN" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "EN" (rect 21 27 36 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 32)(pt 16 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 48)
|
||||||
|
(input)
|
||||||
|
(text "CLR" (rect 0 0 23 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CLR" (rect 21 43 44 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 48)(pt 16 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 64)
|
||||||
|
(input)
|
||||||
|
(text "CP" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "CP" (rect 21 59 36 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 64)(pt 16 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 80)
|
||||||
|
(input)
|
||||||
|
(text "D7" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D7" (rect 21 75 36 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 80)(pt 16 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 96)
|
||||||
|
(input)
|
||||||
|
(text "D6" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D6" (rect 21 91 36 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 96)(pt 16 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 112)
|
||||||
|
(input)
|
||||||
|
(text "D5" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D5" (rect 21 107 36 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 112)(pt 16 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 128)
|
||||||
|
(input)
|
||||||
|
(text "D4" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D4" (rect 21 123 36 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 128)(pt 16 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 144)
|
||||||
|
(input)
|
||||||
|
(text "D3" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D3" (rect 21 139 36 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 144)(pt 16 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 160)
|
||||||
|
(input)
|
||||||
|
(text "D2" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D2" (rect 21 155 36 169)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 160)(pt 16 160)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 176)
|
||||||
|
(input)
|
||||||
|
(text "D1" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D1" (rect 21 171 36 185)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 176)(pt 16 176)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 0 192)
|
||||||
|
(input)
|
||||||
|
(text "D0" (rect 0 0 15 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "D0" (rect 21 187 36 201)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 0 192)(pt 16 192)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 32)
|
||||||
|
(output)
|
||||||
|
(text "Q7" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q7" (rect 59 27 75 41)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 32)(pt 80 32)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 48)
|
||||||
|
(output)
|
||||||
|
(text "Q6" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q6" (rect 59 43 75 57)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 48)(pt 80 48)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 64)
|
||||||
|
(output)
|
||||||
|
(text "Q5" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q5" (rect 59 59 75 73)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 64)(pt 80 64)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 80)
|
||||||
|
(output)
|
||||||
|
(text "Q4" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q4" (rect 59 75 75 89)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 80)(pt 80 80)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 96)
|
||||||
|
(output)
|
||||||
|
(text "Q3" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q3" (rect 59 91 75 105)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 96)(pt 80 96)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 112)
|
||||||
|
(output)
|
||||||
|
(text "Q2" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q2" (rect 59 107 75 121)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 112)(pt 80 112)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 128)
|
||||||
|
(output)
|
||||||
|
(text "Q1" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q1" (rect 59 123 75 137)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 128)(pt 80 128)(line_width 1))
|
||||||
|
)
|
||||||
|
(port
|
||||||
|
(pt 96 144)
|
||||||
|
(output)
|
||||||
|
(text "Q0" (rect 0 0 16 14)(font "Arial" (font_size 8)))
|
||||||
|
(text "Q0" (rect 59 139 75 153)(font "Arial" (font_size 8)))
|
||||||
|
(line (pt 96 144)(pt 80 144)(line_width 1))
|
||||||
|
)
|
||||||
|
(drawing
|
||||||
|
(rectangle (rect 16 16 80 208)(line_width 1))
|
||||||
|
)
|
||||||
|
)
|
||||||
@ -73,3 +73,5 @@ set_location_assignment PIN_146 -to Q4
|
|||||||
set_location_assignment PIN_147 -to Q5
|
set_location_assignment PIN_147 -to Q5
|
||||||
set_location_assignment PIN_149 -to Q6
|
set_location_assignment PIN_149 -to Q6
|
||||||
set_location_assignment PIN_150 -to Q7
|
set_location_assignment PIN_150 -to Q7
|
||||||
|
set_global_assignment -name MISC_FILE "D:/projects/quartus/register_8b_with_switch/register_8b_with_switch.dpf"
|
||||||
|
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
|
||||||
載入中…
x
新增問題並參考
Block a user