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Finish uPC and whole design of RAM project

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2022-03-21 16:15:14 +08:00
父節點 e5315fad02
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microprogram_ram/microprogram_ram.qsf
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@@ -41,7 +41,13 @@ set_global_assignment -name DEVICE EP2C8Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY microprogram_ram
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:35:41 MARCH 17, 2022"
set_global_assignment -name LAST_QUARTUS_VERSION 8.1
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name MISC_FILE "D:/dev/quartus/microprogram_ram/microprogram_ram.dpf"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"