modify adder_8b

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计组课设。
### adder
### adder_8b
8位加法计算器。

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@ -1,211 +0,0 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
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)
(drawing
(rectangle (rect 16 16 80 304)(line_width 1))
)
)

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Mon Mar 07 08:49:27 2022

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[ProjectWorkspace]
ptn_Child1=Frames
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames

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start_full_compilation:s:00:00:06
start_analysis_synthesis:s:00:00:02-start_full_compilation
start_analysis_elaboration:s-start_full_compilation
start_fitter:s:00:00:02-start_full_compilation
start_assembler:s:00:00:01-start_full_compilation
start_timing_analyzer:s:00:00:01-start_full_compilation

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@ -1,5 +1,5 @@
Assembler report for adder
Mon Mar 07 08:49:26 2022
Assembler report for adder_8b
Mon Mar 07 10:22:24 2022
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
@ -10,8 +10,8 @@ Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
2. Assembler Summary
3. Assembler Settings
4. Assembler Generated Files
5. Assembler Device Options: D:/projects/quartus/adder/adder.sof
6. Assembler Device Options: D:/projects/quartus/adder/adder.pof
5. Assembler Device Options: D:/projects/quartus/adder_8b/adder_8b.sof
6. Assembler Device Options: D:/projects/quartus/adder_8b/adder_8b.pof
7. Assembler Messages
@ -38,9 +38,9 @@ applicable agreement for further details.
+---------------------------------------------------------------+
; Assembler Summary ;
+-----------------------+---------------------------------------+
; Assembler Status ; Successful - Mon Mar 07 08:49:26 2022 ;
; Revision Name ; adder ;
; Top-level Entity Name ; adder ;
; Assembler Status ; Successful - Mon Mar 07 10:22:24 2022 ;
; Revision Name ; adder_8b ;
; Top-level Entity Name ; adder_8b ;
; Family ; Cyclone II ;
; Device ; EP2C8Q208C8 ;
+-----------------------+---------------------------------------+
@ -76,37 +76,37 @@ applicable agreement for further details.
+-----------------------------------------------------------------------------+----------+---------------+
+-------------------------------------+
; Assembler Generated Files ;
+-------------------------------------+
; File Name ;
+-------------------------------------+
; D:/projects/quartus/adder/adder.sof ;
; D:/projects/quartus/adder/adder.pof ;
+-------------------------------------+
+-------------------------------------------+
; Assembler Generated Files ;
+-------------------------------------------+
; File Name ;
+-------------------------------------------+
; D:/projects/quartus/adder_8b/adder_8b.sof ;
; D:/projects/quartus/adder_8b/adder_8b.pof ;
+-------------------------------------------+
+---------------------------------------------------------------+
; Assembler Device Options: D:/projects/quartus/adder/adder.sof ;
+----------------+----------------------------------------------+
; Option ; Setting ;
+----------------+----------------------------------------------+
; Device ; EP2C8Q208C8 ;
; JTAG usercode ; 0xFFFFFFFF ;
; Checksum ; 0x000C8655 ;
+----------------+----------------------------------------------+
+---------------------------------------------------------------------+
; Assembler Device Options: D:/projects/quartus/adder_8b/adder_8b.sof ;
+----------------+----------------------------------------------------+
; Option ; Setting ;
+----------------+----------------------------------------------------+
; Device ; EP2C8Q208C8 ;
; JTAG usercode ; 0xFFFFFFFF ;
; Checksum ; 0x000C8655 ;
+----------------+----------------------------------------------------+
+---------------------------------------------------------------+
; Assembler Device Options: D:/projects/quartus/adder/adder.pof ;
+--------------------+------------------------------------------+
; Option ; Setting ;
+--------------------+------------------------------------------+
; Device ; EPCS4 ;
; JTAG usercode ; 0x00000000 ;
; Checksum ; 0x06F061B0 ;
; Compression Ratio ; 3 ;
+--------------------+------------------------------------------+
+---------------------------------------------------------------------+
; Assembler Device Options: D:/projects/quartus/adder_8b/adder_8b.pof ;
+--------------------+------------------------------------------------+
; Option ; Setting ;
+--------------------+------------------------------------------------+
; Device ; EPCS4 ;
; JTAG usercode ; 0x00000000 ;
; Checksum ; 0x06F061B0 ;
; Compression Ratio ; 3 ;
+--------------------+------------------------------------------------+
+--------------------+
@ -115,15 +115,15 @@ applicable agreement for further details.
Info: *******************************************************************
Info: Running Quartus II Assembler
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
Info: Processing started: Mon Mar 07 08:49:25 2022
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off adder -c adder
Info: Processing started: Mon Mar 07 10:22:24 2022
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b
Info: Writing out detailed assembly data for power analysis
Info: Assembler is generating device programming files
Info: The Active Serial/Parallel mode CONF_DONE pin error check is disabled
Info: Quartus II Assembler was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 242 megabytes
Info: Processing ended: Mon Mar 07 08:49:26 2022
Info: Elapsed time: 00:00:01
Info: Processing ended: Mon Mar 07 10:22:24 2022
Info: Elapsed time: 00:00:00
Info: Total CPU time (on all processors): 00:00:00

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1
adder_8b/adder_8b.done Normal file
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@ -0,0 +1 @@
Mon Mar 07 10:22:26 2022

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Fitter report for adder
Mon Mar 07 08:49:24 2022
Fitter report for adder_8b
Mon Mar 07 10:22:23 2022
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
@ -63,10 +63,10 @@ applicable agreement for further details.
+-----------------------------------------------------------------------------------+
; Fitter Summary ;
+------------------------------------+----------------------------------------------+
; Fitter Status ; Successful - Mon Mar 07 08:49:24 2022 ;
; Fitter Status ; Successful - Mon Mar 07 10:22:23 2022 ;
; Quartus II Version ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
; Revision Name ; adder ;
; Top-level Entity Name ; adder ;
; Revision Name ; adder_8b ;
; Top-level Entity Name ; adder_8b ;
; Family ; Cyclone II ;
; Device ; EP2C8Q208C8 ;
; Timing Models ; Final ;
@ -185,7 +185,7 @@ applicable agreement for further details.
+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in D:/projects/quartus/adder/adder.pin.
The pin-out file can be found in D:/projects/quartus/adder_8b/adder_8b.pin.
+--------------------------------------------------------------------+
@ -548,29 +548,29 @@ Note: Pin directions (input, output or bidir) are based on device operating in u
Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity ;
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+---------------------+--------------+
; Compilation Hierarchy Node ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M4Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Full Hierarchy Name ; Library Name ;
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+---------------------+--------------+
; |adder ; 21 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; 21 (0) ; 0 (0) ; 0 (0) ; |adder ; work ;
; |7400:inst13| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |adder|7400:inst13 ; work ;
; |7400:inst18| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7400:inst18 ; work ;
; |7400:inst23| ; 3 (3) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 0 (0) ; |adder|7400:inst23 ; work ;
; |7400:inst28| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7400:inst28 ; work ;
; |7400:inst33| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |adder|7400:inst33 ; work ;
; |7400:inst38| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7400:inst38 ; work ;
; |7400:inst3| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |adder|7400:inst3 ; work ;
; |7400:inst8| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7400:inst8 ; work ;
; |7486:inst10| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst10 ; work ;
; |7486:inst15| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst15 ; work ;
; |7486:inst20| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst20 ; work ;
; |7486:inst25| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst25 ; work ;
; |7486:inst30| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst30 ; work ;
; |7486:inst35| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst35 ; work ;
; |7486:inst40| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst40 ; work ;
; |7486:inst5| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder|7486:inst5 ; work ;
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+---------------------+--------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity ;
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------+--------------+
; Compilation Hierarchy Node ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M4Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Full Hierarchy Name ; Library Name ;
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------+--------------+
; |adder_8b ; 21 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; 21 (0) ; 0 (0) ; 0 (0) ; |adder_8b ; work ;
; |7400:inst13| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst13 ; work ;
; |7400:inst18| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst18 ; work ;
; |7400:inst23| ; 3 (3) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst23 ; work ;
; |7400:inst28| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst28 ; work ;
; |7400:inst33| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst33 ; work ;
; |7400:inst38| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst38 ; work ;
; |7400:inst3| ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst3 ; work ;
; |7400:inst8| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7400:inst8 ; work ;
; |7486:inst10| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst10 ; work ;
; |7486:inst15| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst15 ; work ;
; |7486:inst20| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst20 ; work ;
; |7486:inst25| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst25 ; work ;
; |7486:inst30| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst30 ; work ;
; |7486:inst35| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst35 ; work ;
; |7486:inst40| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst40 ; work ;
; |7486:inst5| ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 0 (0) ; |adder_8b|7486:inst5 ; work ;
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
@ -942,10 +942,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
Info: Processing started: Mon Mar 07 08:49:23 2022
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off adder -c adder
Info: Processing started: Mon Mar 07 10:22:22 2022
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b
Info: Parallel compilation is enabled and will use 4 of the 4 processors detected
Info: Selected device EP2C8Q208C8 for design "adder"
Info: Selected device EP2C8Q208C8 for design "adder_8b"
Info: Low junction temperature is 0 degrees C
Info: High junction temperature is 85 degrees C
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
@ -1024,10 +1024,10 @@ Warning: Found 9 output pins without output pin load capacitance assignment
Info: Pin "S6" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Delay annotation completed successfully
Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'.
Info: Generated suppressed messages file D:/projects/quartus/adder/adder.fit.smsg
Info: Generated suppressed messages file D:/projects/quartus/adder_8b/adder_8b.fit.smsg
Info: Quartus II Fitter was successful. 0 errors, 3 warnings
Info: Peak virtual memory: 305 megabytes
Info: Processing ended: Mon Mar 07 08:49:24 2022
Info: Processing ended: Mon Mar 07 10:22:23 2022
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
@ -1035,6 +1035,6 @@ Info: Quartus II Fitter was successful. 0 errors, 3 warnings
+----------------------------+
; Fitter Suppressed Messages ;
+----------------------------+
The suppressed messages can be found in D:/projects/quartus/adder/adder.fit.smsg.
The suppressed messages can be found in D:/projects/quartus/adder_8b/adder_8b.fit.smsg.

查看文件

@ -1,7 +1,7 @@
Fitter Status : Successful - Mon Mar 07 08:49:24 2022
Fitter Status : Successful - Mon Mar 07 10:22:23 2022
Quartus II Version : 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition
Revision Name : adder
Top-level Entity Name : adder
Revision Name : adder_8b
Top-level Entity Name : adder_8b
Family : Cyclone II
Device : EP2C8Q208C8
Timing Models : Final

查看文件

@ -1,5 +1,5 @@
Flow report for adder
Mon Mar 07 08:49:27 2022
Flow report for adder_8b
Mon Mar 07 10:22:25 2022
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
@ -38,10 +38,10 @@ applicable agreement for further details.
+-----------------------------------------------------------------------------------+
; Flow Summary ;
+------------------------------------+----------------------------------------------+
; Flow Status ; Successful - Mon Mar 07 08:49:27 2022 ;
; Flow Status ; Successful - Mon Mar 07 10:22:25 2022 ;
; Quartus II Version ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
; Revision Name ; adder ;
; Top-level Entity Name ; adder ;
; Revision Name ; adder_8b ;
; Top-level Entity Name ; adder_8b ;
; Family ; Cyclone II ;
; Device ; EP2C8Q208C8 ;
; Timing Models ; Final ;
@ -63,9 +63,9 @@ applicable agreement for further details.
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 03/07/2022 08:49:22 ;
; Start date & time ; 03/07/2022 10:22:21 ;
; Main task ; Compilation ;
; Revision Name ; adder ;
; Revision Name ; adder_8b ;
+-------------------+---------------------+
@ -74,7 +74,7 @@ applicable agreement for further details.
+------------------------------------+---------------------------------+---------------+-------------+----------------+
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
+------------------------------------+---------------------------------+---------------+-------------+----------------+
; COMPILER_SIGNATURE_ID ; 220283517943889.164661416219416 ; -- ; -- ; -- ;
; COMPILER_SIGNATURE_ID ; 220283517943889.164661974110084 ; -- ; -- ; -- ;
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
@ -90,9 +90,9 @@ applicable agreement for further details.
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis ; 00:00:01 ; 1.0 ; 245 MB ; 00:00:00 ;
; Fitter ; 00:00:01 ; 1.0 ; 305 MB ; 00:00:01 ;
; Assembler ; 00:00:01 ; 1.0 ; 242 MB ; 00:00:00 ;
; Classic Timing Analyzer ; 00:00:01 ; 1.0 ; 198 MB ; 00:00:00 ;
; Total ; 00:00:04 ; -- ; -- ; 00:00:01 ;
; Assembler ; 00:00:00 ; 1.0 ; 242 MB ; 00:00:00 ;
; Classic Timing Analyzer ; 00:00:00 ; 1.0 ; 198 MB ; 00:00:00 ;
; Total ; 00:00:02 ; -- ; -- ; 00:00:01 ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
@ -111,10 +111,10 @@ applicable agreement for further details.
------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off adder -c adder
quartus_fit --read_settings_files=off --write_settings_files=off adder -c adder
quartus_asm --read_settings_files=off --write_settings_files=off adder -c adder
quartus_tan --read_settings_files=off --write_settings_files=off adder -c adder --timing_analysis_only
quartus_map --read_settings_files=on --write_settings_files=off adder_8b -c adder_8b
quartus_fit --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b
quartus_asm --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b
quartus_tan --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b --timing_analysis_only

查看文件

@ -1,5 +1,5 @@
Analysis & Synthesis report for adder
Mon Mar 07 08:49:22 2022
Analysis & Synthesis report for adder_8b
Mon Mar 07 10:22:21 2022
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
@ -39,10 +39,10 @@ applicable agreement for further details.
+-----------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+------------------------------------+----------------------------------------------+
; Analysis & Synthesis Status ; Successful - Mon Mar 07 08:49:22 2022 ;
; Analysis & Synthesis Status ; Successful - Mon Mar 07 10:22:21 2022 ;
; Quartus II Version ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
; Revision Name ; adder ;
; Top-level Entity Name ; adder ;
; Revision Name ; adder_8b ;
; Top-level Entity Name ; adder_8b ;
; Family ; Cyclone II ;
; Total logic elements ; 21 ;
; Total combinational functions ; 21 ;
@ -62,7 +62,7 @@ applicable agreement for further details.
; Option ; Setting ; Default Value ;
+--------------------------------------------------------------+--------------------+--------------------+
; Device ; EP2C8Q208C8 ; ;
; Top-level entity name ; adder ; adder ;
; Top-level entity name ; adder_8b ; adder_8b ;
; Family name ; Cyclone II ; Stratix II ;
; Use Generated Physical Constraints File ; Off ; ;
; Use smart compilation ; Off ; Off ;
@ -136,7 +136,7 @@ applicable agreement for further details.
+----------------------------------+-----------------+------------------------------------+------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
+----------------------------------+-----------------+------------------------------------+------------------------------------------------------------+
; adder.bdf ; yes ; User Block Diagram/Schematic File ; D:/projects/quartus/adder/adder.bdf ;
; adder_8b.bdf ; yes ; User Block Diagram/Schematic File ; D:/projects/quartus/adder_8b/adder_8b.bdf ;
; 7400.bdf ; yes ; Megafunction ; d:/altera/90sp2/quartus/libraries/others/maxplus2/7400.bdf ;
; 7486.bdf ; yes ; Megafunction ; d:/altera/90sp2/quartus/libraries/others/maxplus2/7486.bdf ;
+----------------------------------+-----------------+------------------------------------+------------------------------------------------------------+
@ -171,29 +171,29 @@ applicable agreement for further details.
+---------------------------------------------+----------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
; |adder ; 21 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; |adder ; work ;
; |7400:inst13| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst13 ; work ;
; |7400:inst18| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst18 ; work ;
; |7400:inst23| ; 3 (3) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst23 ; work ;
; |7400:inst28| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst28 ; work ;
; |7400:inst33| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst33 ; work ;
; |7400:inst38| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst38 ; work ;
; |7400:inst3| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst3 ; work ;
; |7400:inst8| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7400:inst8 ; work ;
; |7486:inst10| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst10 ; work ;
; |7486:inst15| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst15 ; work ;
; |7486:inst20| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst20 ; work ;
; |7486:inst25| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst25 ; work ;
; |7486:inst30| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst30 ; work ;
; |7486:inst35| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst35 ; work ;
; |7486:inst40| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst40 ; work ;
; |7486:inst5| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder|7486:inst5 ; work ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------+--------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------+--------------+
; |adder_8b ; 21 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; |adder_8b ; work ;
; |7400:inst13| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst13 ; work ;
; |7400:inst18| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst18 ; work ;
; |7400:inst23| ; 3 (3) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst23 ; work ;
; |7400:inst28| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst28 ; work ;
; |7400:inst33| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst33 ; work ;
; |7400:inst38| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst38 ; work ;
; |7400:inst3| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst3 ; work ;
; |7400:inst8| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7400:inst8 ; work ;
; |7486:inst10| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst10 ; work ;
; |7486:inst15| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst15 ; work ;
; |7486:inst20| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst20 ; work ;
; |7486:inst25| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst25 ; work ;
; |7486:inst30| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst30 ; work ;
; |7486:inst35| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst35 ; work ;
; |7486:inst40| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst40 ; work ;
; |7486:inst5| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |adder_8b|7486:inst5 ; work ;
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
@ -218,11 +218,11 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
Info: Processing started: Mon Mar 07 08:49:21 2022
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off adder -c adder
Info: Found 1 design units, including 1 entities, in source file adder.bdf
Info: Found entity 1: adder
Info: Elaborating entity "adder" for the top level hierarchy
Info: Processing started: Mon Mar 07 10:22:20 2022
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off adder_8b -c adder_8b
Info: Found 1 design units, including 1 entities, in source file adder_8b.bdf
Info: Found entity 1: adder_8b
Info: Elaborating entity "adder_8b" for the top level hierarchy
Info: Elaborating entity "7400" for hierarchy "7400:inst38"
Info: Elaborated megafunction instantiation "7400:inst38"
Info: Elaborating entity "7486" for hierarchy "7486:inst"
@ -233,7 +233,7 @@ Info: Implemented 47 device resources after synthesis - the final resource count
Info: Implemented 21 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 248 megabytes
Info: Processing ended: Mon Mar 07 08:49:22 2022
Info: Processing ended: Mon Mar 07 10:22:21 2022
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01

查看文件

@ -1,7 +1,7 @@
Analysis & Synthesis Status : Successful - Mon Mar 07 08:49:22 2022
Analysis & Synthesis Status : Successful - Mon Mar 07 10:22:21 2022
Quartus II Version : 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition
Revision Name : adder
Top-level Entity Name : adder
Revision Name : adder_8b
Top-level Entity Name : adder_8b
Family : Cyclone II
Total logic elements : 21
Total combinational functions : 21

查看文件

@ -64,7 +64,7 @@
---------------------------------------------------------------------------------
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
CHIP "adder" ASSIGNED TO AN: EP2C8Q208C8
CHIP "adder_8b" ASSIGNED TO AN: EP2C8Q208C8
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
-------------------------------------------------------------------------------------------------------------

查看文件

@ -18,13 +18,13 @@
#
# Quartus II
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
# Date created = 08:48:37 March 07, 2022
# Date created = 10:21:41 March 07, 2022
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "9.0"
DATE = "08:48:37 March 07, 2022"
DATE = "10:21:41 March 07, 2022"
# Revisions
PROJECT_REVISION = "adder"
PROJECT_REVISION = "adder_8b"

查看文件

@ -18,14 +18,14 @@
#
# Quartus II
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
# Date created = 08:48:37 March 07, 2022
# Date created = 10:21:41 March 07, 2022
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# adder_assignment_defaults.qdf
# adder_8b_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
@ -38,14 +38,14 @@
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C8Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY adder
set_global_assignment -name TOP_LEVEL_ENTITY adder_8b
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "08:48:37 MARCH 07, 2022"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:21:41 MARCH 07, 2022"
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name BDF_FILE adder.bdf
set_global_assignment -name BDF_FILE adder_8b.bdf
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top

查看文件

@ -1,5 +1,5 @@
Classic Timing Analyzer report for adder
Mon Mar 07 08:49:27 2022
Classic Timing Analyzer report for adder_8b
Mon Mar 07 10:22:25 2022
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
@ -204,8 +204,8 @@ applicable agreement for further details.
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
Info: Processing started: Mon Mar 07 08:49:26 2022
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off adder -c adder --timing_analysis_only
Info: Processing started: Mon Mar 07 10:22:25 2022
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b --timing_analysis_only
Info: Parallel compilation is enabled and will use 4 of the 4 processors detected
Info: Longest tpd from source pin "A1" to destination pin "CO" is 19.344 ns
Info: 1: + IC(0.000 ns) + CELL(0.994 ns) = 0.994 ns; Loc. = PIN_57; Fanout = 2; PIN Node = 'A1'
@ -221,8 +221,8 @@ Info: Longest tpd from source pin "A1" to destination pin "CO" is 19.344 ns
Info: Total interconnect delay = 11.950 ns ( 61.78 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 212 megabytes
Info: Processing ended: Mon Mar 07 08:49:27 2022
Info: Elapsed time: 00:00:01
Info: Processing ended: Mon Mar 07 10:22:25 2022
Info: Elapsed time: 00:00:00
Info: Total CPU time (on all processors): 00:00:00

二進制
adder_8b/db/adder_8b.(0).cnf.hdb Normal file

未顯示二進位檔案。

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@ -1,7 +1,7 @@
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 08:49:25 2022 " "Info: Processing started: Mon Mar 07 08:49:25 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off adder -c adder " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off adder -c adder" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 10:22:24 2022 " "Info: Processing started: Mon Mar 07 10:22:24 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off adder_8b -c adder_8b" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" { } { } 0 0 "Writing out detailed assembly data for power analysis" 0 0 "" 0 -1}
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" { } { } 0 0 "Assembler is generating device programming files" 0 0 "" 0 -1}
{ "Info" "IPGMIO_CONDONE_ERROR_CHECKS_DISABLED" "" "Info: The Active Serial/Parallel mode CONF_DONE pin error check is disabled" { } { } 0 0 "The Active Serial/Parallel mode CONF_DONE pin error check is disabled" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "242 " "Info: Peak virtual memory: 242 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 08:49:26 2022 " "Info: Processing ended: Mon Mar 07 08:49:26 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "242 " "Info: Peak virtual memory: 242 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 10:22:24 2022 " "Info: Processing ended: Mon Mar 07 10:22:24 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}

查看文件

@ -1,5 +1,5 @@
<?xml version="1.0" ?>
<LOG_ROOT>
<PROJECT NAME="adder">
<PROJECT NAME="adder_8b">
</PROJECT>
</LOG_ROOT>

二進制
adder_8b/db/adder_8b.cmp.bpm Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.cmp.cdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.cmp.hdb Normal file

未顯示二進位檔案。

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@ -1,4 +1,4 @@
<kpt_db name="adder.cmp" kpt_version="1.1">
<kpt_db name="adder_8b.cmp" kpt_version="1.1">
<key_points_set type="reference" hier_sep="|">
</key_points_set>
<key_points_set type="transition" hier_sep="|">

二進制
adder_8b/db/adder_8b.cmp.rdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.cmp.tdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.cmp0.ddb Normal file

未顯示二進位檔案。

查看文件

@ -1,4 +1,4 @@
<kpt_db name="adder.cmp_merge" kpt_version="1.1">
<kpt_db name="adder_8b.cmp_merge" kpt_version="1.1">
<key_points_set type="reference" hier_sep="|">
</key_points_set>
<key_points_set type="transition" hier_sep="|">

查看文件

@ -1,3 +1,3 @@
Quartus_Version = Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
Version_Index = 167832322
Creation_Time = Mon Mar 07 08:48:37 2022
Creation_Time = Mon Mar 07 10:21:41 2022

檔案差異因為一行或多行太長而無法顯示

查看文件

@ -1,4 +1,4 @@
|adder
|adder_8b
CO <= 7400:inst38.1
A7 => 7400:inst39.3
A7 => 7486:inst36.2
@ -44,241 +44,241 @@ S5 <= 7486:inst30.1
S6 <= 7486:inst35.1
|adder|7400:inst38
|adder_8b|7400:inst38
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst39
|adder_8b|7400:inst39
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst37
|adder_8b|7400:inst37
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst33
|adder_8b|7400:inst33
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst34
|adder_8b|7400:inst34
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst32
|adder_8b|7400:inst32
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst28
|adder_8b|7400:inst28
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst29
|adder_8b|7400:inst29
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst27
|adder_8b|7400:inst27
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst23
|adder_8b|7400:inst23
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst24
|adder_8b|7400:inst24
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst22
|adder_8b|7400:inst22
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst18
|adder_8b|7400:inst18
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst19
|adder_8b|7400:inst19
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst17
|adder_8b|7400:inst17
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst13
|adder_8b|7400:inst13
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst14
|adder_8b|7400:inst14
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst12
|adder_8b|7400:inst12
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst8
|adder_8b|7400:inst8
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst9
|adder_8b|7400:inst9
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst7
|adder_8b|7400:inst7
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst3
|adder_8b|7400:inst3
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst4
|adder_8b|7400:inst4
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7400:inst2
|adder_8b|7400:inst2
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst
|adder_8b|7486:inst
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst6
|adder_8b|7486:inst6
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst11
|adder_8b|7486:inst11
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst16
|adder_8b|7486:inst16
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst21
|adder_8b|7486:inst21
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst26
|adder_8b|7486:inst26
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst31
|adder_8b|7486:inst31
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst36
|adder_8b|7486:inst36
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst40
|adder_8b|7486:inst40
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst5
|adder_8b|7486:inst5
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst10
|adder_8b|7486:inst10
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst15
|adder_8b|7486:inst15
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst20
|adder_8b|7486:inst20
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst25
|adder_8b|7486:inst25
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst30
|adder_8b|7486:inst30
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1
|adder|7486:inst35
|adder_8b|7486:inst35
1 <= 4.DB_MAX_OUTPUT_PORT_TYPE
2 => 4.IN0
3 => 4.IN1

查看文件

@ -19,14 +19,14 @@ VHSM_ON
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
adder
adder_8b
# storage
db|adder.(0).cnf
db|adder.(0).cnf
db|adder_8b.(0).cnf
db|adder_8b.(0).cnf
# case_insensitive
# source_file
adder.bdf
24315e582bd755b4b98eeb6d569ea2
adder_8b.bdf
a2e51ddcd21f2ca4364ec3cc2afc185
26
# internal_option {
BLOCK_DESIGN_NAMING
@ -41,8 +41,8 @@ AUTO
# entity
7400
# storage
db|adder.(1).cnf
db|adder.(1).cnf
db|adder_8b.(1).cnf
db|adder_8b.(1).cnf
# case_insensitive
# source_file
..|..|..|altera|90sp2|quartus|libraries|others|maxplus2|7400.bdf
@ -84,8 +84,8 @@ AUTO
# entity
7486
# storage
db|adder.(2).cnf
db|adder.(2).cnf
db|adder_8b.(2).cnf
db|adder_8b.(2).cnf
# case_insensitive
# source_file
..|..|..|altera|90sp2|quartus|libraries|others|maxplus2|7486.bdf

二進制
adder_8b/db/adder_8b.map.bpm Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.map.cdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.map.hdb Normal file

未顯示二進位檔案。

查看文件

@ -1,4 +1,4 @@
<kpt_db name="adder.map" kpt_version="1.1">
<kpt_db name="adder_8b.map" kpt_version="1.1">
<key_points_set type="reference" hier_sep="/">
</key_points_set>
<key_points_set type="transition" hier_sep="|">

查看文件

@ -1,11 +1,11 @@
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 08:49:21 2022 " "Info: Processing started: Mon Mar 07 08:49:21 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off adder -c adder " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off adder -c adder" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "adder.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file adder.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 adder " "Info: Found entity 1: adder" { } { { "adder.bdf" "" { Schematic "D:/projects/quartus/adder/adder.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_TOP" "adder " "Info: Elaborating entity \"adder\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "7400 7400:inst38 " "Info: Elaborating entity \"7400\" for hierarchy \"7400:inst38\"" { } { { "adder.bdf" "inst38" { Schematic "D:/projects/quartus/adder/adder.bdf" { { 184 432 496 224 "inst38" "" } } } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_ELABORATION_HEADER" "7400:inst38 " "Info: Elaborated megafunction instantiation \"7400:inst38\"" { } { { "adder.bdf" "" { Schematic "D:/projects/quartus/adder/adder.bdf" { { 184 432 496 224 "inst38" "" } } } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "7486 7486:inst " "Info: Elaborating entity \"7486\" for hierarchy \"7486:inst\"" { } { { "adder.bdf" "inst" { Schematic "D:/projects/quartus/adder/adder.bdf" { { 2096 304 368 2136 "inst" "" } } } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_ELABORATION_HEADER" "7486:inst " "Info: Elaborated megafunction instantiation \"7486:inst\"" { } { { "adder.bdf" "" { Schematic "D:/projects/quartus/adder/adder.bdf" { { 2096 304 368 2136 "inst" "" } } } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 10:22:20 2022 " "Info: Processing started: Mon Mar 07 10:22:20 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off adder_8b -c adder_8b " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off adder_8b -c adder_8b" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "adder_8b.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file adder_8b.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 adder_8b " "Info: Found entity 1: adder_8b" { } { { "adder_8b.bdf" "" { Schematic "D:/projects/quartus/adder_8b/adder_8b.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_TOP" "adder_8b " "Info: Elaborating entity \"adder_8b\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "7400 7400:inst38 " "Info: Elaborating entity \"7400\" for hierarchy \"7400:inst38\"" { } { { "adder_8b.bdf" "inst38" { Schematic "D:/projects/quartus/adder_8b/adder_8b.bdf" { { 184 400 464 224 "inst38" "" } } } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_ELABORATION_HEADER" "7400:inst38 " "Info: Elaborated megafunction instantiation \"7400:inst38\"" { } { { "adder_8b.bdf" "" { Schematic "D:/projects/quartus/adder_8b/adder_8b.bdf" { { 184 400 464 224 "inst38" "" } } } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "7486 7486:inst " "Info: Elaborating entity \"7486\" for hierarchy \"7486:inst\"" { } { { "adder_8b.bdf" "inst" { Schematic "D:/projects/quartus/adder_8b/adder_8b.bdf" { { 2096 272 336 2136 "inst" "" } } } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_ELABORATION_HEADER" "7486:inst " "Info: Elaborated megafunction instantiation \"7486:inst\"" { } { { "adder_8b.bdf" "" { Schematic "D:/projects/quartus/adder_8b/adder_8b.bdf" { { 2096 272 336 2136 "inst" "" } } } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_TM_SUMMARY" "47 " "Info: Implemented 47 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "17 " "Info: Implemented 17 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "9 " "Info: Implemented 9 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "21 " "Info: Implemented 21 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "248 " "Info: Peak virtual memory: 248 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 08:49:22 2022 " "Info: Processing ended: Mon Mar 07 08:49:22 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "248 " "Info: Peak virtual memory: 248 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 10:22:21 2022 " "Info: Processing ended: Mon Mar 07 10:22:21 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}

二進制
adder_8b/db/adder_8b.map_bb.cdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.map_bb.hdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.pre_map.cdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.pre_map.hdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.rtlv.hdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.sgdiff.cdb Normal file

未顯示二進位檔案。

二進制
adder_8b/db/adder_8b.sgdiff.hdb Normal file

未顯示二進位檔案。

檔案差異因為一行或多行太長而無法顯示

本差異變更的檔案數量過多導致部分檔案未顯示 顯示更多