diff --git a/microprogram_ram/microprogram_ram.qsf b/microprogram_ram/microprogram_ram.qsf index 3fe5ebe..acf983f 100644 --- a/microprogram_ram/microprogram_ram.qsf +++ b/microprogram_ram/microprogram_ram.qsf @@ -41,7 +41,7 @@ set_global_assignment -name DEVICE EP2C8Q208C8 set_global_assignment -name TOP_LEVEL_ENTITY microprogram_ram set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2" set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:35:41 MARCH 17, 2022" -set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2" +set_global_assignment -name LAST_QUARTUS_VERSION 8.1 set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 \ No newline at end of file diff --git a/microprogram_ram/start_circuit.bdf b/microprogram_ram/start_circuit.bdf new file mode 100644 index 0000000..bf0e313 --- /dev/null +++ b/microprogram_ram/start_circuit.bdf @@ -0,0 +1,451 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2009 Altera Corporation +Your use of Altera Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Altera Program License +Subscription Agreement, Altera MegaCore Function License +Agreement, or other applicable license agreement, including, +without limitation, that your use is for the sole purpose of +programming logic devices manufactured by Altera and sold by +Altera or its authorized distributors. Please refer to the +applicable agreement for further details. +*/ +//#pragma file_not_in_maxplusii_format +(header "graphic" (version "1.3")) +(pin + (input) + (rect 112 280 280 296) + (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) + (text "CLR" (rect 5 0 27 12)(font "Arial" )) + (pt 168 8) + (drawing + (line (pt 92 12)(pt 117 12)(line_width 1)) + (line (pt 92 4)(pt 117 4)(line_width 1)) + (line (pt 121 8)(pt 168 8)(line_width 1)) + (line (pt 92 12)(pt 92 4)(line_width 1)) + (line (pt 117 4)(pt 121 8)(line_width 1)) + (line (pt 117 12)(pt 121 8)(line_width 1)) + ) + (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6))) +) +(pin + (input) + (rect 112 72 280 88) + (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) + (text "HALT" (rect 5 0 32 12)(font "Arial" )) + (pt 168 8) + (drawing + (line (pt 92 12)(pt 117 12)(line_width 1)) + (line (pt 92 4)(pt 117 4)(line_width 1)) + (line (pt 121 8)(pt 168 8)(line_width 1)) + (line (pt 92 12)(pt 92 4)(line_width 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(pt 704 88) + (pt 736 88) +) +(junction (pt 624 96)) +(junction (pt 488 288)) +(junction (pt 344 288)) +(junction (pt 296 288)) diff --git a/microprogram_ram/start_circuit.bsf b/microprogram_ram/start_circuit.bsf new file mode 100644 index 0000000..9a97926 --- /dev/null +++ b/microprogram_ram/start_circuit.bsf @@ -0,0 +1,64 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 1991-2009 Altera Corporation +Your use of Altera Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Altera Program License +Subscription Agreement, Altera MegaCore Function License +Agreement, or other applicable license agreement, including, +without limitation, that your use is for the sole purpose of +programming logic devices manufactured by Altera and sold by +Altera or its authorized distributors. Please refer to the +applicable agreement for further details. +*/ +(header "symbol" (version "1.1")) +(symbol + (rect 16 16 112 144) + (text "start_circuit" (rect 5 0 72 14)(font "Arial" (font_size 8))) + (text "inst" (rect 8 112 25 124)(font "Arial" )) + (port + (pt 0 32) + (input) + (text "HALT" (rect 0 0 31 14)(font "Arial" (font_size 8))) + (text "HALT" (rect 21 27 52 41)(font "Arial" (font_size 8))) + (line (pt 0 32)(pt 16 32)(line_width 1)) + ) + (port + (pt 0 48) + (input) + (text "CK_C" (rect 0 0 31 14)(font "Arial" (font_size 8))) + (text "CK_C" (rect 21 43 52 57)(font "Arial" (font_size 8))) + (line (pt 0 48)(pt 16 48)(line_width 1)) + ) + (port + (pt 0 64) + (input) + (text "CK" (rect 0 0 16 14)(font "Arial" (font_size 8))) + (text "CK" (rect 21 59 37 73)(font "Arial" (font_size 8))) + (line (pt 0 64)(pt 16 64)(line_width 1)) + ) + (port + (pt 0 80) + (input) + (text "CLR" (rect 0 0 23 14)(font "Arial" (font_size 8))) + (text "CLR" (rect 21 75 44 89)(font "Arial" (font_size 8))) + (line (pt 0 80)(pt 16 80)(line_width 1)) + ) + (port + (pt 96 32) + (output) + (text "CP" (rect 0 0 15 14)(font "Arial" (font_size 8))) + (text "CP" (rect 60 27 75 41)(font "Arial" (font_size 8))) + (line (pt 96 32)(pt 80 32)(line_width 1)) + ) + (drawing + (rectangle (rect 16 16 80 112)(line_width 1)) + ) +) diff --git a/start_circuit/start_circuit.qpf b/start_circuit/start_circuit.qpf new file mode 100644 index 0000000..3b02afc --- /dev/null +++ b/start_circuit/start_circuit.qpf @@ -0,0 +1,23 @@ +# Copyright (C) 1991-2008 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. + + + +QUARTUS_VERSION = "8.1" +DATE = "20:24:57 March 17, 2022" + + +# Revisions + +PROJECT_REVISION = "start_circuit" diff --git a/start_circuit/start_circuit.qsf b/start_circuit/start_circuit.qsf new file mode 100644 index 0000000..19b2f6a --- /dev/null +++ b/start_circuit/start_circuit.qsf @@ -0,0 +1,37 @@ +# Copyright (C) 1991-2008 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. + + +# The default values for assignments are stored in the file +# start_circuit_assignment_defaults.qdf +# If this file doesn't exist, and for assignments not listed, see file +# assignment_defaults.qdf + +# Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. + + +set_global_assignment -name FAMILY "Cyclone II" +set_global_assignment -name DEVICE EP2C8Q208C7 +set_global_assignment -name TOP_LEVEL_ENTITY start_circuit +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 8.1 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:24:57 MARCH 17, 2022" +set_global_assignment -name LAST_QUARTUS_VERSION 8.1 +set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga +set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name BDF_FILE start_circuit.bdf +set_global_assignment -name USE_CONFIGURATION_DEVICE ON \ No newline at end of file