add register_8b_premium
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register_8b_premium/register_8b_premium.bdf
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register_8b_premium/register_8b_premium.bdf
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register_8b_premium/register_8b_premium.bsf
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register_8b_premium/register_8b_premium.bsf
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/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 1991-2009 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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*/
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(header "symbol" (version "1.1"))
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(symbol
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(rect 16 16 136 272)
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(text "register_8b_premium" (rect 5 0 124 14)(font "Arial" (font_size 8)))
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(text "inst" (rect 8 240 25 252)(font "Arial" ))
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(drawing
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(rectangle (rect 16 16 104 240)(line_width 1))
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)
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)
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30
register_8b_premium/register_8b_premium.qpf
Normal file
30
register_8b_premium/register_8b_premium.qpf
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@ -0,0 +1,30 @@
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2009 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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||||||
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# associated documentation or information are expressly subject
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||||||
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# to the terms and conditions of the Altera Program License
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||||||
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# Subscription Agreement, Altera MegaCore Function License
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||||||
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# Agreement, or other applicable license agreement, including,
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||||||
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II
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# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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# Date created = 16:30:30 March 29, 2022
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#
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# -------------------------------------------------------------------------- #
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QUARTUS_VERSION = "9.0"
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DATE = "16:30:30 March 29, 2022"
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# Revisions
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PROJECT_REVISION = "register_8b_premium"
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48
register_8b_premium/register_8b_premium.qsf
Normal file
48
register_8b_premium/register_8b_premium.qsf
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@ -0,0 +1,48 @@
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2009 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II
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# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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# Date created = 16:30:30 March 29, 2022
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# register_8b_premium_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone II"
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set_global_assignment -name DEVICE EP2C8Q208C8
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set_global_assignment -name TOP_LEVEL_ENTITY register_8b_premium
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:30:30 MARCH 29, 2022"
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set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
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set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name BDF_FILE register_8b_premium.bdf
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