94 行
4.2 KiB
Plaintext
94 行
4.2 KiB
Plaintext
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2009 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II
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# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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# Date created = 16:09:17 May 17, 2022
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# test_ALU_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone II"
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set_global_assignment -name DEVICE EP2C8Q208C8
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set_global_assignment -name TOP_LEVEL_ENTITY test_ALU
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:09:17 MAY 17, 2022"
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set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
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set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name USE_CONFIGURATION_DEVICE ON
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
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set_global_assignment -name BDF_FILE test_ALU.bdf
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
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set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_location_assignment PIN_67 -to A0
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set_location_assignment PIN_68 -to A1
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set_location_assignment PIN_69 -to A2
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set_location_assignment PIN_70 -to A3
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set_location_assignment PIN_72 -to A4
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set_location_assignment PIN_74 -to A5
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set_location_assignment PIN_75 -to A6
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set_location_assignment PIN_76 -to A7
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set_location_assignment PIN_23 -to B0
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set_location_assignment PIN_24 -to B1
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set_location_assignment PIN_27 -to B2
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set_location_assignment PIN_28 -to B3
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set_location_assignment PIN_208 -to B4
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set_location_assignment PIN_129 -to B5
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set_location_assignment PIN_130 -to B6
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set_location_assignment PIN_107 -to B7
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set_location_assignment PIN_77 -to CP_A
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set_location_assignment PIN_80 -to CP_B
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set_location_assignment PIN_81 -to CP_Z
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set_location_assignment PIN_82 -to CLR
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set_location_assignment PIN_142 -to FLG_C
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set_location_assignment PIN_143 -to FLG_V
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set_location_assignment PIN_144 -to FLG_N
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set_location_assignment PIN_145 -to FLG_Z
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set_location_assignment PIN_151 -to Q0
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set_location_assignment PIN_152 -to Q1
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set_location_assignment PIN_160 -to Q2
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set_location_assignment PIN_161 -to Q3
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set_location_assignment PIN_162 -to Q4
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set_location_assignment PIN_163 -to Q5
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set_location_assignment PIN_164 -to Q6
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set_location_assignment PIN_165 -to Q7
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set_location_assignment PIN_84 -to S0
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set_location_assignment PIN_86 -to S1
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set_location_assignment PIN_87 -to S2
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set_global_assignment -name MISC_FILE "D:/projects/quartus/test_ALU/test_ALU.dpf"
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set_location_assignment PIN_88 -to test_in
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set_location_assignment PIN_34 -to test_out |