quartus/microprogram_ram/microprogram_ram.qsf
2022-03-30 08:41:24 +08:00

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2009 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
# Date created = 19:35:41 March 17, 2022
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# microprogram_ram_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C8Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY microprogram_ram
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:35:41 MARCH 17, 2022"
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name MISC_FILE "D:/dev/quartus/microprogram_ram/microprogram_ram.dpf"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name MISC_FILE "D:/projects/quartus/microprogram_ram/microprogram_ram.dpf"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_192 -to D0
set_location_assignment PIN_193 -to D1
set_location_assignment PIN_195 -to D2
set_location_assignment PIN_197 -to D3
set_location_assignment PIN_198 -to D4
set_location_assignment PIN_199 -to D5
set_location_assignment PIN_200 -to D6
set_location_assignment PIN_201 -to D7
set_location_assignment PIN_168 -to A0
set_location_assignment PIN_169 -to A1
set_location_assignment PIN_170 -to A2
set_location_assignment PIN_171 -to A3
set_location_assignment PIN_173 -to A4
set_location_assignment PIN_175 -to A5
set_location_assignment PIN_176 -to A6
set_location_assignment PIN_179 -to A7
set_location_assignment PIN_180 -to uA0
set_location_assignment PIN_181 -to uA1
set_location_assignment PIN_182 -to uA2
set_location_assignment PIN_185 -to uA3
set_location_assignment PIN_187 -to uA4
set_location_assignment PIN_188 -to uA5
set_location_assignment PIN_189 -to uA6
set_location_assignment PIN_191 -to uA7
set_location_assignment PIN_89 -to uIR0_CPPC
set_location_assignment PIN_90 -to uIR1_CPMAR
set_location_assignment PIN_92 -to uIR2_CPMBR
set_location_assignment PIN_94 -to uIR3_ENMBR
set_location_assignment PIN_95 -to uIR4_PCY
set_location_assignment PIN_96 -to uIR5_MARY
set_location_assignment PIN_97 -to uIR6_WD
set_location_assignment PIN_99 -to uIR7_RD
set_location_assignment PIN_101 -to uIR8_HALT
set_location_assignment PIN_131 -to CK_Constant
set_location_assignment PIN_132 -to CK_Single
set_location_assignment PIN_77 -to CLR
set_location_assignment PIN_61 -to CP_uIR
set_location_assignment PIN_60 -to uRDN
set_location_assignment PIN_63 -to M_RDN
set_location_assignment PIN_64 -to M_WDN
set_location_assignment PIN_142 -to LR_D0
set_location_assignment PIN_143 -to LR_D1
set_location_assignment PIN_144 -to LR_D2
set_location_assignment PIN_145 -to LR_D3
set_location_assignment PIN_146 -to LR_D4
set_location_assignment PIN_147 -to LR_D5
set_location_assignment PIN_149 -to LR_D6
set_location_assignment PIN_150 -to LR_D7
set_location_assignment PIN_151 -to LR_A0
set_location_assignment PIN_152 -to LR_A1
set_location_assignment PIN_160 -to LR_A2
set_location_assignment PIN_161 -to LR_A3
set_location_assignment PIN_162 -to LR_A4
set_location_assignment PIN_163 -to LR_A5
set_location_assignment PIN_164 -to LR_A6
set_location_assignment PIN_165 -to LR_A7
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"