quartus/machine_alpha/machine_alpha.bdf

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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
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(text "from MDR" (rect 824 736 879 750)(font "Arial" (font_size 8)))
(text "from general registers" (rect 776 864 902 878)(font "Arial" (font_size 8)))
(text "from PC" (rect 792 1232 836 1246)(font "Arial" (font_size 8)))
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(text "BUS" (rect 3056 1744 3080 1758)(font "Arial" (font_size 8)))
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(text "Part of CU: Microaddress Generator and uPC" (rect 2848 1856 3653 1893)(font "Arial" (color 0 113 181)(font_size 24)(bold)))
(text "Memory, MAR and MDR" (rect 2848 800 3270 837)(font "Arial" (color 215 102 0)(font_size 24)(bold)))
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