modify double_selector_8b
This commit is contained in:
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Sun Mar 06 21:30:44 2022
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<?xml version="1.0" encoding="UTF-8"?>
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<pin_planner>
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<pin_info>
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</pin_info>
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<buses>
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</buses>
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<group_file_association>
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</group_file_association>
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<pin_planner_file_specifies>
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</pin_planner_file_specifies>
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</pin_planner>
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EDA Netlist Writer report for data_selector
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Sun Mar 06 21:30:44 2022
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Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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---------------------
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. EDA Netlist Writer Summary
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3. EDA Netlist Writer Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2009 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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+----------------------------------------------------------------------------------+
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; EDA Netlist Writer Summary ;
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+---------------------------+------------------------------------------------------+
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; EDA Netlist Writer Status ; No Output Files Generated - Sun Mar 06 21:30:44 2022 ;
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; Revision Name ; data_selector ;
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; Top-level Entity Name ; data_selector ;
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; Family ; Cyclone II ;
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+---------------------------+------------------------------------------------------+
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+-----------------------------+
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; EDA Netlist Writer Messages ;
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+-----------------------------+
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Info: *******************************************************************
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Info: Running Quartus II EDA Netlist Writer
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Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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Info: Processing started: Sun Mar 06 21:30:43 2022
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Info: Command: quartus_eda --read_settings_files=on --write_settings_files=off data_selector -c data_selector
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Warning: Can't generate output files. Specify command-line options to generate output files, or update EDA tool settings using GUI or Tcl script.
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Info: Quartus II EDA Netlist Writer was successful. 0 errors, 1 warning
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Info: Peak virtual memory: 167 megabytes
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Info: Processing ended: Sun Mar 06 21:30:44 2022
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Info: Elapsed time: 00:00:01
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Info: Total CPU time (on all processors): 00:00:00
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[ProjectWorkspace]
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ptn_Child1=Frames
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[ProjectWorkspace.Frames]
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ptn_Child1=ChildFrames
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[ProjectWorkspace.Frames.ChildFrames]
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ptn_Child1=Document-0
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[ProjectWorkspace.Frames.ChildFrames.Document-0]
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ptn_Child1=ViewFrame-0
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[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0]
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DocPathName=data_selector.bdf
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DocumentCLSID={7b19e8f2-2bbe-11d1-a082-0020affa5bde}
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IsChildFrameDetached=False
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IsActiveChildFrame=True
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ptn_Child1=StateMap
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未顯示二進位檔案。
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 06 21:29:30 2022 " "Info: Processing started: Sun Mar 06 21:29:30 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off data_selector -c data_selector " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off data_selector -c data_selector" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
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{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" { } { } 0 0 "Writing out detailed assembly data for power analysis" 0 0 "" 0 -1}
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{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" { } { } 0 0 "Assembler is generating device programming files" 0 0 "" 0 -1}
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{ "Info" "IPGMIO_CONDONE_ERROR_CHECKS_DISABLED" "" "Info: The Active Serial/Parallel mode CONF_DONE pin error check is disabled" { } { } 0 0 "The Active Serial/Parallel mode CONF_DONE pin error check is disabled" 0 0 "" 0 -1}
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{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "221 " "Info: Peak virtual memory: 221 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 06 21:29:31 2022 " "Info: Processing ended: Sun Mar 06 21:29:31 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
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未顯示二進位檔案。
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II " "Info: Running Quartus II EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 06 21:30:43 2022 " "Info: Processing started: Sun Mar 06 21:30:43 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=on --write_settings_files=off data_selector -c data_selector " "Info: Command: quartus_eda --read_settings_files=on --write_settings_files=off data_selector -c data_selector" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
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||||
{ "Warning" "WQNETO_NO_OUTPUT_FILES" "" "Warning: Can't generate output files. Specify command-line options to generate output files, or update EDA tool settings using GUI or Tcl script." { } { } 0 0 "Can't generate output files. Specify command-line options to generate output files, or update EDA tool settings using GUI or Tcl script." 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 1 Quartus II " "Info: Quartus II EDA Netlist Writer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "167 " "Info: Peak virtual memory: 167 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 06 21:30:44 2022 " "Info: Processing ended: Sun Mar 06 21:30:44 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
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檔案差異因為一行或多行太長而無法顯示
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 06 21:29:23 2022 " "Info: Processing started: Sun Mar 06 21:29:23 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off data_selector -c data_selector " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off data_selector -c data_selector" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "data_selector.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file data_selector.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 data_selector " "Info: Found entity 1: data_selector" { } { { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
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{ "Info" "ISGN_START_ELABORATION_TOP" "data_selector " "Info: Elaborating entity \"data_selector\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
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{ "Info" "ICUT_CUT_TM_SUMMARY" "34 " "Info: Implemented 34 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "18 " "Info: Implemented 18 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Info: Implemented 8 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "8 " "Info: Implemented 8 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1}
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{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "230 " "Info: Peak virtual memory: 230 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 06 21:29:25 2022 " "Info: Processing ended: Sun Mar 06 21:29:25 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
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||||
未顯示二進位檔案。
未顯示二進位檔案。
未顯示二進位檔案。
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@ -1,6 +0,0 @@
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 06 21:29:32 2022 " "Info: Processing started: Sun Mar 06 21:29:32 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off data_selector -c data_selector --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off data_selector -c data_selector --timing_analysis_only" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 6 " "Info: Parallel compilation is enabled and will use 4 of the 6 processors detected" { } { } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
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{ "Info" "ITDB_FULL_TPD_RESULT" "b5 Y5 12.694 ns Longest " "Info: Longest tpd from source pin \"b5\" to destination pin \"Y5\" is 12.694 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.995 ns) 0.995 ns b5 1 PIN PIN_45 1 " "Info: 1: + IC(0.000 ns) + CELL(0.995 ns) = 0.995 ns; Loc. = PIN_45; Fanout = 1; PIN Node = 'b5'" { } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { b5 } "NODE_NAME" } } { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { { 432 176 344 448 "b5" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(6.147 ns) + CELL(0.624 ns) 7.766 ns inst6 2 COMB LCCOMB_X1_Y9_N26 1 " "Info: 2: + IC(6.147 ns) + CELL(0.624 ns) = 7.766 ns; Loc. = LCCOMB_X1_Y9_N26; Fanout = 1; COMB Node = 'inst6'" { } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "6.771 ns" { b5 inst6 } "NODE_NAME" } } { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { { 128 776 840 176 "inst6" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.642 ns) + CELL(3.286 ns) 12.694 ns Y5 3 PIN PIN_208 0 " "Info: 3: + IC(1.642 ns) + CELL(3.286 ns) = 12.694 ns; Loc. = PIN_208; Fanout = 0; PIN Node = 'Y5'" { } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "4.928 ns" { inst6 Y5 } "NODE_NAME" } } { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { { 144 928 1104 160 "Y5" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.905 ns ( 38.64 % ) " "Info: Total cell delay = 4.905 ns ( 38.64 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "7.789 ns ( 61.36 % ) " "Info: Total interconnect delay = 7.789 ns ( 61.36 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1} } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "12.694 ns" { b5 inst6 Y5 } "NODE_NAME" } } { "c:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "12.694 ns" { b5 {} b5~combout {} inst6 {} Y5 {} } { 0.000ns 0.000ns 6.147ns 1.642ns } { 0.000ns 0.995ns 0.624ns 3.286ns } "" } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "192 " "Info: Peak virtual memory: 192 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 06 21:29:32 2022 " "Info: Processing ended: Sun Mar 06 21:29:32 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
||||
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||||
start_full_compilation:s:00:00:15
|
||||
start_analysis_synthesis:s:00:00:09-start_full_compilation
|
||||
start_analysis_elaboration:s-start_full_compilation
|
||||
start_fitter:s:00:00:03-start_full_compilation
|
||||
start_assembler:s:00:00:02-start_full_compilation
|
||||
start_timing_analyzer:s:00:00:01-start_full_compilation
|
||||
start_eda_netlist_writer:s:00:00:01
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檔案差異因為一行或多行太長而無法顯示
檔案差異因為一行或多行太長而無法顯示
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 06 21:29:32 2022 " "Info: Processing started: Sun Mar 06 21:29:32 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off data_selector -c data_selector --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off data_selector -c data_selector --timing_analysis_only" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 6 " "Info: Parallel compilation is enabled and will use 4 of the 6 processors detected" { } { } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
|
||||
{ "Info" "ITDB_FULL_TPD_RESULT" "b5 Y5 12.694 ns Longest " "Info: Longest tpd from source pin \"b5\" to destination pin \"Y5\" is 12.694 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.995 ns) 0.995 ns b5 1 PIN PIN_45 1 " "Info: 1: + IC(0.000 ns) + CELL(0.995 ns) = 0.995 ns; Loc. = PIN_45; Fanout = 1; PIN Node = 'b5'" { } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { b5 } "NODE_NAME" } } { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { { 432 176 344 448 "b5" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(6.147 ns) + CELL(0.624 ns) 7.766 ns inst6 2 COMB LCCOMB_X1_Y9_N26 1 " "Info: 2: + IC(6.147 ns) + CELL(0.624 ns) = 7.766 ns; Loc. = LCCOMB_X1_Y9_N26; Fanout = 1; COMB Node = 'inst6'" { } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "6.771 ns" { b5 inst6 } "NODE_NAME" } } { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { { 128 776 840 176 "inst6" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.642 ns) + CELL(3.286 ns) 12.694 ns Y5 3 PIN PIN_208 0 " "Info: 3: + IC(1.642 ns) + CELL(3.286 ns) = 12.694 ns; Loc. = PIN_208; Fanout = 0; PIN Node = 'Y5'" { } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "4.928 ns" { inst6 Y5 } "NODE_NAME" } } { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { { 144 928 1104 160 "Y5" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.905 ns ( 38.64 % ) " "Info: Total cell delay = 4.905 ns ( 38.64 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "7.789 ns ( 61.36 % ) " "Info: Total interconnect delay = 7.789 ns ( 61.36 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1} } { { "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "12.694 ns" { b5 inst6 Y5 } "NODE_NAME" } } { "c:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "12.694 ns" { b5 {} b5~combout {} inst6 {} Y5 {} } { 0.000ns 0.000ns 6.147ns 1.642ns } { 0.000ns 0.995ns 0.624ns 3.286ns } "" } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "192 " "Info: Peak virtual memory: 192 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 06 21:29:32 2022 " "Info: Processing ended: Sun Mar 06 21:29:32 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
||||
未顯示二進位檔案。
未顯示二進位檔案。
未顯示二進位檔案。
未顯示二進位檔案。
未顯示二進位檔案。
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.(0).cnf.hdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.(0).cnf.hdb
Normal file
未顯示二進位檔案。
@ -1,7 +1,7 @@
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 06 21:29:30 2022 " "Info: Processing started: Sun Mar 06 21:29:30 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off data_selector -c data_selector " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off data_selector -c data_selector" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 11:07:55 2022 " "Info: Processing started: Mon Mar 07 11:07:55 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" { } { } 0 0 "Writing out detailed assembly data for power analysis" 0 0 "" 0 -1}
|
||||
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" { } { } 0 0 "Assembler is generating device programming files" 0 0 "" 0 -1}
|
||||
{ "Info" "IPGMIO_CONDONE_ERROR_CHECKS_DISABLED" "" "Info: The Active Serial/Parallel mode CONF_DONE pin error check is disabled" { } { } 0 0 "The Active Serial/Parallel mode CONF_DONE pin error check is disabled" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "221 " "Info: Peak virtual memory: 221 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 06 21:29:31 2022 " "Info: Processing ended: Sun Mar 06 21:29:31 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "241 " "Info: Peak virtual memory: 241 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 11:07:56 2022 " "Info: Processing ended: Mon Mar 07 11:07:56 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
||||
@ -1,5 +1,5 @@
|
||||
<?xml version="1.0" ?>
|
||||
<LOG_ROOT>
|
||||
<PROJECT NAME="data_selector">
|
||||
<PROJECT NAME="double_selector_8b">
|
||||
</PROJECT>
|
||||
</LOG_ROOT>
|
||||
二進制
double_selector_8b/db/double_selector_8b.cmp.bpm
Normal file
二進制
double_selector_8b/db/double_selector_8b.cmp.bpm
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.cmp.cdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.cmp.cdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.cmp.hdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.cmp.hdb
Normal file
未顯示二進位檔案。
@ -1,4 +1,4 @@
|
||||
<kpt_db name="data_selector.cmp" kpt_version="1.1">
|
||||
<kpt_db name="double_selector_8b.cmp" kpt_version="1.1">
|
||||
<key_points_set type="reference" hier_sep="|">
|
||||
</key_points_set>
|
||||
<key_points_set type="transition" hier_sep="|">
|
||||
二進制
double_selector_8b/db/double_selector_8b.cmp.rdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.cmp.rdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.cmp.tdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.cmp.tdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.cmp0.ddb
Normal file
二進制
double_selector_8b/db/double_selector_8b.cmp0.ddb
Normal file
未顯示二進位檔案。
@ -1,4 +1,4 @@
|
||||
<kpt_db name="data_selector.cmp_merge" kpt_version="1.1">
|
||||
<kpt_db name="double_selector_8b.cmp_merge" kpt_version="1.1">
|
||||
<key_points_set type="reference" hier_sep="|">
|
||||
</key_points_set>
|
||||
<key_points_set type="transition" hier_sep="|">
|
||||
@ -1,3 +1,3 @@
|
||||
Quartus_Version = Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
Version_Index = 167832322
|
||||
Creation_Time = Sat Mar 05 19:48:38 2022
|
||||
Creation_Time = Mon Mar 07 11:06:00 2022
|
||||
39
double_selector_8b/db/double_selector_8b.fit.qmsg
Normal file
39
double_selector_8b/db/double_selector_8b.fit.qmsg
Normal file
檔案差異因為一行或多行太長而無法顯示
@ -1,4 +1,4 @@
|
||||
|data_selector
|
||||
|double_selector_8b
|
||||
Y0 <= inst1.DB_MAX_OUTPUT_PORT_TYPE
|
||||
b0 => inst25.IN0
|
||||
BY => inst25.IN1
|
||||
@ -19,14 +19,14 @@ VHSM_ON
|
||||
-- Start VHDL Libraries --
|
||||
-- End VHDL Libraries --
|
||||
# entity
|
||||
data_selector
|
||||
double_selector_8b
|
||||
# storage
|
||||
db|data_selector.(0).cnf
|
||||
db|data_selector.(0).cnf
|
||||
db|double_selector_8b.(0).cnf
|
||||
db|double_selector_8b.(0).cnf
|
||||
# case_insensitive
|
||||
# source_file
|
||||
data_selector.bdf
|
||||
bca46c741e5dd2513eb8c7ec51bf2eee
|
||||
double_selector_8b.bdf
|
||||
175873c0dd68c1f8d97dd4bedd5ca23
|
||||
26
|
||||
# internal_option {
|
||||
BLOCK_DESIGN_NAMING
|
||||
二進制
double_selector_8b/db/double_selector_8b.map.bpm
Normal file
二進制
double_selector_8b/db/double_selector_8b.map.bpm
Normal file
未顯示二進位檔案。
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.map.hdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.map.hdb
Normal file
未顯示二進位檔案。
@ -1,4 +1,4 @@
|
||||
<kpt_db name="data_selector.map" kpt_version="1.1">
|
||||
<kpt_db name="double_selector_8b.map" kpt_version="1.1">
|
||||
<key_points_set type="reference" hier_sep="/">
|
||||
</key_points_set>
|
||||
<key_points_set type="transition" hier_sep="|">
|
||||
@ -1,7 +1,7 @@
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 06 21:29:23 2022 " "Info: Processing started: Sun Mar 06 21:29:23 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off data_selector -c data_selector " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off data_selector -c data_selector" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "data_selector.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file data_selector.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 data_selector " "Info: Found entity 1: data_selector" { } { { "data_selector.bdf" "" { Schematic "D:/dev/quartus/data_selector/data_selector.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "ISGN_START_ELABORATION_TOP" "data_selector " "Info: Elaborating entity \"data_selector\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 11:07:52 2022 " "Info: Processing started: Mon Mar 07 11:07:52 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off double_selector_8b -c double_selector_8b " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off double_selector_8b -c double_selector_8b" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "double_selector_8b.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file double_selector_8b.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 double_selector_8b " "Info: Found entity 1: double_selector_8b" { } { { "double_selector_8b.bdf" "" { Schematic "D:/projects/quartus/double_selector_8b/double_selector_8b.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "ISGN_START_ELABORATION_TOP" "double_selector_8b " "Info: Elaborating entity \"double_selector_8b\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
|
||||
{ "Info" "ICUT_CUT_TM_SUMMARY" "34 " "Info: Implemented 34 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "18 " "Info: Implemented 18 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Info: Implemented 8 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "8 " "Info: Implemented 8 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "230 " "Info: Peak virtual memory: 230 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 06 21:29:25 2022 " "Info: Processing ended: Sun Mar 06 21:29:25 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "248 " "Info: Peak virtual memory: 248 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 11:07:53 2022 " "Info: Processing ended: Mon Mar 07 11:07:53 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
||||
二進制
double_selector_8b/db/double_selector_8b.map_bb.cdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.map_bb.cdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.map_bb.hdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.map_bb.hdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.pre_map.cdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.pre_map.cdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.pre_map.hdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.pre_map.hdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.rtlv.hdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.rtlv.hdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.sgdiff.cdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.sgdiff.cdb
Normal file
未顯示二進位檔案。
二進制
double_selector_8b/db/double_selector_8b.sgdiff.hdb
Normal file
二進制
double_selector_8b/db/double_selector_8b.sgdiff.hdb
Normal file
未顯示二進位檔案。
6
double_selector_8b/db/double_selector_8b.tan.qmsg
Normal file
6
double_selector_8b/db/double_selector_8b.tan.qmsg
Normal file
@ -0,0 +1,6 @@
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 11:07:57 2022 " "Info: Processing started: Mon Mar 07 11:07:57 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b --timing_analysis_only" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Info: Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
|
||||
{ "Info" "ITDB_FULL_TPD_RESULT" "b5 Y5 12.694 ns Longest " "Info: Longest tpd from source pin \"b5\" to destination pin \"Y5\" is 12.694 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.995 ns) 0.995 ns b5 1 PIN PIN_45 1 " "Info: 1: + IC(0.000 ns) + CELL(0.995 ns) = 0.995 ns; Loc. = PIN_45; Fanout = 1; PIN Node = 'b5'" { } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { b5 } "NODE_NAME" } } { "double_selector_8b.bdf" "" { Schematic "D:/projects/quartus/double_selector_8b/double_selector_8b.bdf" { { 640 64 232 656 "b5" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(6.147 ns) + CELL(0.624 ns) 7.766 ns inst6 2 COMB LCCOMB_X1_Y9_N26 1 " "Info: 2: + IC(6.147 ns) + CELL(0.624 ns) = 7.766 ns; Loc. = LCCOMB_X1_Y9_N26; Fanout = 1; COMB Node = 'inst6'" { } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "6.771 ns" { b5 inst6 } "NODE_NAME" } } { "double_selector_8b.bdf" "" { Schematic "D:/projects/quartus/double_selector_8b/double_selector_8b.bdf" { { 336 664 728 384 "inst6" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.642 ns) + CELL(3.286 ns) 12.694 ns Y5 3 PIN PIN_208 0 " "Info: 3: + IC(1.642 ns) + CELL(3.286 ns) = 12.694 ns; Loc. = PIN_208; Fanout = 0; PIN Node = 'Y5'" { } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "4.928 ns" { inst6 Y5 } "NODE_NAME" } } { "double_selector_8b.bdf" "" { Schematic "D:/projects/quartus/double_selector_8b/double_selector_8b.bdf" { { 352 816 992 368 "Y5" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.905 ns ( 38.64 % ) " "Info: Total cell delay = 4.905 ns ( 38.64 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "7.789 ns ( 61.36 % ) " "Info: Total interconnect delay = 7.789 ns ( 61.36 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1} } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "12.694 ns" { b5 inst6 Y5 } "NODE_NAME" } } { "d:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "12.694 ns" { b5 {} b5~combout {} inst6 {} Y5 {} } { 0.000ns 0.000ns 6.147ns 1.642ns } { 0.000ns 0.995ns 0.624ns 3.286ns } "" } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "212 " "Info: Peak virtual memory: 212 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 11:07:57 2022 " "Info: Processing ended: Mon Mar 07 11:07:57 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
||||
@ -1,5 +1,5 @@
|
||||
Assembler report for data_selector
|
||||
Sun Mar 06 21:29:31 2022
|
||||
Assembler report for double_selector_8b
|
||||
Mon Mar 07 11:07:56 2022
|
||||
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
|
||||
|
||||
@ -10,8 +10,8 @@ Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
2. Assembler Summary
|
||||
3. Assembler Settings
|
||||
4. Assembler Generated Files
|
||||
5. Assembler Device Options: D:/dev/quartus/data_selector/data_selector.sof
|
||||
6. Assembler Device Options: D:/dev/quartus/data_selector/data_selector.pof
|
||||
5. Assembler Device Options: D:/projects/quartus/double_selector_8b/double_selector_8b.sof
|
||||
6. Assembler Device Options: D:/projects/quartus/double_selector_8b/double_selector_8b.pof
|
||||
7. Assembler Messages
|
||||
|
||||
|
||||
@ -38,9 +38,9 @@ applicable agreement for further details.
|
||||
+---------------------------------------------------------------+
|
||||
; Assembler Summary ;
|
||||
+-----------------------+---------------------------------------+
|
||||
; Assembler Status ; Successful - Sun Mar 06 21:29:31 2022 ;
|
||||
; Revision Name ; data_selector ;
|
||||
; Top-level Entity Name ; data_selector ;
|
||||
; Assembler Status ; Successful - Mon Mar 07 11:07:56 2022 ;
|
||||
; Revision Name ; double_selector_8b ;
|
||||
; Top-level Entity Name ; double_selector_8b ;
|
||||
; Family ; Cyclone II ;
|
||||
; Device ; EP2C8Q208C8 ;
|
||||
+-----------------------+---------------------------------------+
|
||||
@ -76,37 +76,37 @@ applicable agreement for further details.
|
||||
+-----------------------------------------------------------------------------+----------+---------------+
|
||||
|
||||
|
||||
+------------------------------------------------+
|
||||
; Assembler Generated Files ;
|
||||
+------------------------------------------------+
|
||||
; File Name ;
|
||||
+------------------------------------------------+
|
||||
; D:/dev/quartus/data_selector/data_selector.sof ;
|
||||
; D:/dev/quartus/data_selector/data_selector.pof ;
|
||||
+------------------------------------------------+
|
||||
+---------------------------------------------------------------+
|
||||
; Assembler Generated Files ;
|
||||
+---------------------------------------------------------------+
|
||||
; File Name ;
|
||||
+---------------------------------------------------------------+
|
||||
; D:/projects/quartus/double_selector_8b/double_selector_8b.sof ;
|
||||
; D:/projects/quartus/double_selector_8b/double_selector_8b.pof ;
|
||||
+---------------------------------------------------------------+
|
||||
|
||||
|
||||
+--------------------------------------------------------------------------+
|
||||
; Assembler Device Options: D:/dev/quartus/data_selector/data_selector.sof ;
|
||||
+----------------+---------------------------------------------------------+
|
||||
; Option ; Setting ;
|
||||
+----------------+---------------------------------------------------------+
|
||||
; Device ; EP2C8Q208C8 ;
|
||||
; JTAG usercode ; 0xFFFFFFFF ;
|
||||
; Checksum ; 0x000C1D58 ;
|
||||
+----------------+---------------------------------------------------------+
|
||||
+-----------------------------------------------------------------------------------------+
|
||||
; Assembler Device Options: D:/projects/quartus/double_selector_8b/double_selector_8b.sof ;
|
||||
+----------------+------------------------------------------------------------------------+
|
||||
; Option ; Setting ;
|
||||
+----------------+------------------------------------------------------------------------+
|
||||
; Device ; EP2C8Q208C8 ;
|
||||
; JTAG usercode ; 0xFFFFFFFF ;
|
||||
; Checksum ; 0x000C6B76 ;
|
||||
+----------------+------------------------------------------------------------------------+
|
||||
|
||||
|
||||
+--------------------------------------------------------------------------+
|
||||
; Assembler Device Options: D:/dev/quartus/data_selector/data_selector.pof ;
|
||||
+--------------------+-----------------------------------------------------+
|
||||
; Option ; Setting ;
|
||||
+--------------------+-----------------------------------------------------+
|
||||
; Device ; EPCS4 ;
|
||||
; JTAG usercode ; 0x00000000 ;
|
||||
; Checksum ; 0x06EFE46F ;
|
||||
; Compression Ratio ; 3 ;
|
||||
+--------------------+-----------------------------------------------------+
|
||||
+-----------------------------------------------------------------------------------------+
|
||||
; Assembler Device Options: D:/projects/quartus/double_selector_8b/double_selector_8b.pof ;
|
||||
+--------------------+--------------------------------------------------------------------+
|
||||
; Option ; Setting ;
|
||||
+--------------------+--------------------------------------------------------------------+
|
||||
; Device ; EPCS4 ;
|
||||
; JTAG usercode ; 0x00000000 ;
|
||||
; Checksum ; 0x06F07E62 ;
|
||||
; Compression Ratio ; 3 ;
|
||||
+--------------------+--------------------------------------------------------------------+
|
||||
|
||||
|
||||
+--------------------+
|
||||
@ -115,14 +115,14 @@ applicable agreement for further details.
|
||||
Info: *******************************************************************
|
||||
Info: Running Quartus II Assembler
|
||||
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
Info: Processing started: Sun Mar 06 21:29:30 2022
|
||||
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off data_selector -c data_selector
|
||||
Info: Processing started: Mon Mar 07 11:07:55 2022
|
||||
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b
|
||||
Info: Writing out detailed assembly data for power analysis
|
||||
Info: Assembler is generating device programming files
|
||||
Info: The Active Serial/Parallel mode CONF_DONE pin error check is disabled
|
||||
Info: Quartus II Assembler was successful. 0 errors, 0 warnings
|
||||
Info: Peak virtual memory: 221 megabytes
|
||||
Info: Processing ended: Sun Mar 06 21:29:31 2022
|
||||
Info: Peak virtual memory: 241 megabytes
|
||||
Info: Processing ended: Mon Mar 07 11:07:56 2022
|
||||
Info: Elapsed time: 00:00:01
|
||||
Info: Total CPU time (on all processors): 00:00:01
|
||||
|
||||
檔案差異因為檔案過大而無法顯示
載入差異
@ -21,7 +21,7 @@ applicable agreement for further details.
|
||||
(header "symbol" (version "1.1"))
|
||||
(symbol
|
||||
(rect 16 16 112 368)
|
||||
(text "data_selector" (rect 5 0 82 14)(font "Arial" (font_size 8)))
|
||||
(text "double_selector_8b" (rect 5 0 117 14)(font "Arial" (font_size 8)))
|
||||
(text "inst" (rect 8 336 25 348)(font "Arial" ))
|
||||
(port
|
||||
(pt 0 32)
|
||||
1
double_selector_8b/double_selector_8b.done
Normal file
1
double_selector_8b/double_selector_8b.done
Normal file
@ -0,0 +1 @@
|
||||
Mon Mar 07 11:07:57 2022
|
||||
@ -1,5 +1,5 @@
|
||||
Fitter report for data_selector
|
||||
Sun Mar 06 21:29:28 2022
|
||||
Fitter report for double_selector_8b
|
||||
Mon Mar 07 11:07:55 2022
|
||||
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
|
||||
|
||||
@ -63,10 +63,10 @@ applicable agreement for further details.
|
||||
+-----------------------------------------------------------------------------------+
|
||||
; Fitter Summary ;
|
||||
+------------------------------------+----------------------------------------------+
|
||||
; Fitter Status ; Successful - Sun Mar 06 21:29:28 2022 ;
|
||||
; Fitter Status ; Successful - Mon Mar 07 11:07:54 2022 ;
|
||||
; Quartus II Version ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
|
||||
; Revision Name ; data_selector ;
|
||||
; Top-level Entity Name ; data_selector ;
|
||||
; Revision Name ; double_selector_8b ;
|
||||
; Top-level Entity Name ; double_selector_8b ;
|
||||
; Family ; Cyclone II ;
|
||||
; Device ; EP2C8Q208C8 ;
|
||||
; Timing Models ; Final ;
|
||||
@ -137,7 +137,7 @@ applicable agreement for further details.
|
||||
+----------------------------+-------------+
|
||||
; Processors ; Number ;
|
||||
+----------------------------+-------------+
|
||||
; Number detected on machine ; 6 ;
|
||||
; Number detected on machine ; 4 ;
|
||||
; Maximum allowed ; 4 ;
|
||||
; ; ;
|
||||
; Average used ; 1.00 ;
|
||||
@ -146,7 +146,6 @@ applicable agreement for further details.
|
||||
; Usage by Processor ; % Time Used ;
|
||||
; 1 processor ; 100.0% ;
|
||||
; 2-4 processors ; < 0.1% ;
|
||||
; 5-6 processors ; 0.0% ;
|
||||
+----------------------------+-------------+
|
||||
|
||||
|
||||
@ -186,7 +185,7 @@ applicable agreement for further details.
|
||||
+--------------+
|
||||
; Pin-Out File ;
|
||||
+--------------+
|
||||
The pin-out file can be found in D:/dev/quartus/data_selector/data_selector.pin.
|
||||
The pin-out file can be found in D:/projects/quartus/double_selector_8b/double_selector_8b.pin.
|
||||
|
||||
|
||||
+-------------------------------------------------------------------+
|
||||
@ -303,16 +302,16 @@ The pin-out file can be found in D:/dev/quartus/data_selector/data_selector.pin.
|
||||
; 1 ; 0 ; 1 ; ~ASDO~ / RESERVED_INPUT_WITH_WEAK_PULLUP ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; On ;
|
||||
; 2 ; 1 ; 1 ; ~nCSO~ / RESERVED_INPUT_WITH_WEAK_PULLUP ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; On ;
|
||||
; 3 ; 2 ; 1 ; a7 ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 4 ; 3 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 5 ; 4 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 6 ; 5 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 4 ; 3 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 5 ; 4 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 6 ; 5 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 7 ; ; 1 ; VCCIO1 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 8 ; 6 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 8 ; 6 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 10 ; 7 ; 1 ; Y4 ; output ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 11 ; 8 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 11 ; 8 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 12 ; 9 ; 1 ; a4 ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 13 ; 10 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 13 ; 10 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 14 ; 18 ; 1 ; Y2 ; output ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 15 ; 19 ; 1 ; Y3 ; output ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 16 ; 20 ; 1 ; #TDO ; output ; ; ; -- ; ; -- ; -- ;
|
||||
@ -342,11 +341,11 @@ The pin-out file can be found in D:/dev/quartus/data_selector/data_selector.pin.
|
||||
; 40 ; 44 ; 1 ; b0 ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 41 ; 45 ; 1 ; b4 ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 42 ; ; 1 ; VCCIO1 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 43 ; 48 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 43 ; 48 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 44 ; 49 ; 1 ; BY ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 45 ; 50 ; 1 ; b5 ; input ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 46 ; 51 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 47 ; 52 ; 1 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 46 ; 51 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 47 ; 52 ; 1 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 48 ; 53 ; 1 ; Y7 ; output ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 49 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 50 ; ; ; GND_PLL1 ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
@ -359,65 +358,65 @@ The pin-out file can be found in D:/dev/quartus/data_selector/data_selector.pin.
|
||||
; 57 ; 55 ; 4 ; b6 ; input ; 3.3-V LVTTL ; ; Column I/O ; N ; no ; Off ;
|
||||
; 58 ; 56 ; 4 ; Y0 ; output ; 3.3-V LVTTL ; ; Column I/O ; N ; no ; Off ;
|
||||
; 59 ; 57 ; 4 ; b3 ; input ; 3.3-V LVTTL ; ; Column I/O ; N ; no ; Off ;
|
||||
; 60 ; 58 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 61 ; 59 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 60 ; 58 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 61 ; 59 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 62 ; ; 4 ; VCCIO4 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 63 ; 60 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 64 ; 61 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 63 ; 60 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 64 ; 61 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 65 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 66 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
|
||||
; 67 ; 69 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 68 ; 70 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 69 ; 71 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 70 ; 74 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 67 ; 69 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 68 ; 70 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 69 ; 71 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 70 ; 74 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 71 ; ; 4 ; VCCIO4 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 72 ; 75 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 72 ; 75 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 73 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 74 ; 76 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 75 ; 77 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 76 ; 78 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 77 ; 79 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 74 ; 76 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 75 ; 77 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 76 ; 78 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 77 ; 79 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 78 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 79 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
|
||||
; 80 ; 82 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 81 ; 83 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 82 ; 84 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 80 ; 82 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 81 ; 83 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 82 ; 84 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 83 ; ; 4 ; VCCIO4 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 84 ; 85 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 84 ; 85 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 85 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 86 ; 86 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 87 ; 87 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 88 ; 88 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 89 ; 89 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 90 ; 90 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 86 ; 86 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 87 ; 87 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 88 ; 88 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 89 ; 89 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 90 ; 90 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 91 ; ; 4 ; VCCIO4 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 92 ; 91 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 92 ; 91 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 93 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 94 ; 92 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 95 ; 93 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 96 ; 94 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 97 ; 95 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 94 ; 92 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 95 ; 93 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 96 ; 94 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 97 ; 95 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 98 ; ; 4 ; VCCIO4 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 99 ; 96 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 99 ; 96 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 100 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 101 ; 97 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 102 ; 98 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 103 ; 99 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 104 ; 100 ; 4 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 105 ; 101 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 106 ; 102 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 107 ; 105 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 101 ; 97 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 102 ; 98 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 103 ; 99 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 104 ; 100 ; 4 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 105 ; 101 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 106 ; 102 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 107 ; 105 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 108 ; 106 ; 3 ; ~LVDS54p/nCEO~ ; output ; 3.3-V LVTTL ; ; Row I/O ; N ; no ; Off ;
|
||||
; 109 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 110 ; 107 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 110 ; 107 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 111 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 112 ; 108 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 113 ; 109 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 114 ; 110 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 115 ; 112 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 116 ; 113 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 117 ; 114 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 118 ; 117 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 112 ; 108 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 113 ; 109 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 114 ; 110 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 115 ; 112 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 116 ; 113 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 117 ; 114 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 118 ; 117 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 119 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 120 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
|
||||
; 121 ; 121 ; 3 ; ^nSTATUS ; ; ; ; -- ; ; -- ; -- ;
|
||||
@ -426,32 +425,32 @@ The pin-out file can be found in D:/dev/quartus/data_selector/data_selector.pin.
|
||||
; 124 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 125 ; 123 ; 3 ; ^MSEL1 ; ; ; ; -- ; ; -- ; -- ;
|
||||
; 126 ; 124 ; 3 ; ^MSEL0 ; ; ; ; -- ; ; -- ; -- ;
|
||||
; 127 ; 125 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 128 ; 126 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 127 ; 125 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 128 ; 126 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 129 ; 127 ; 3 ; GND+ ; ; ; ; Row I/O ; ; -- ; -- ;
|
||||
; 130 ; 128 ; 3 ; GND+ ; ; ; ; Row I/O ; ; -- ; -- ;
|
||||
; 131 ; 129 ; 3 ; GND+ ; ; ; ; Row I/O ; ; -- ; -- ;
|
||||
; 132 ; 130 ; 3 ; GND+ ; ; ; ; Row I/O ; ; -- ; -- ;
|
||||
; 133 ; 131 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 134 ; 132 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 135 ; 133 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 133 ; 131 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 134 ; 132 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 135 ; 133 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 136 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 137 ; 134 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 138 ; 135 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 139 ; 136 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 137 ; 134 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 138 ; 135 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 139 ; 136 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 140 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 141 ; 137 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 142 ; 138 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 143 ; 141 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 144 ; 142 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 145 ; 143 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 146 ; 149 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 147 ; 150 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 141 ; 137 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 142 ; 138 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 143 ; 141 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 144 ; 142 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 145 ; 143 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 146 ; 149 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 147 ; 150 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 148 ; ; 3 ; VCCIO3 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 149 ; 151 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 150 ; 152 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 151 ; 153 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 152 ; 154 ; 3 ; RESERVED_INPUT ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 149 ; 151 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 150 ; 152 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 151 ; 153 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 152 ; 154 ; 3 ; GND* ; ; ; ; Row I/O ; ; no ; Off ;
|
||||
; 153 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 154 ; ; ; GND_PLL2 ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 155 ; ; ; VCCD_PLL2 ; power ; ; 1.2V ; -- ; ; -- ; -- ;
|
||||
@ -459,54 +458,54 @@ The pin-out file can be found in D:/dev/quartus/data_selector/data_selector.pin.
|
||||
; 157 ; ; ; VCCA_PLL2 ; power ; ; 1.2V ; -- ; ; -- ; -- ;
|
||||
; 158 ; ; ; GNDA_PLL2 ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 159 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 160 ; 155 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 161 ; 156 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 162 ; 157 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 163 ; 158 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 164 ; 159 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 165 ; 160 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 160 ; 155 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 161 ; 156 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 162 ; 157 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 163 ; 158 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 164 ; 159 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 165 ; 160 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 166 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 167 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 168 ; 161 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 169 ; 162 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 170 ; 163 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 171 ; 164 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 168 ; 161 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 169 ; 162 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 170 ; 163 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 171 ; 164 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 172 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 173 ; 165 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 173 ; 165 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 174 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 175 ; 168 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 176 ; 169 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 175 ; 168 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 176 ; 169 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 177 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 178 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
|
||||
; 179 ; 173 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 180 ; 174 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 181 ; 175 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 182 ; 176 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 179 ; 173 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 180 ; 174 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 181 ; 175 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 182 ; 176 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 183 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 184 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 185 ; 180 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 185 ; 180 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 186 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 187 ; 181 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 188 ; 182 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 189 ; 183 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 187 ; 181 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 188 ; 182 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 189 ; 183 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 190 ; ; ; VCCINT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
|
||||
; 191 ; 184 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 192 ; 185 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 193 ; 186 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 191 ; 184 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 192 ; 185 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 193 ; 186 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 194 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 195 ; 187 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 195 ; 187 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 196 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 197 ; 191 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 198 ; 192 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 199 ; 195 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 200 ; 196 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 201 ; 197 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 197 ; 191 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 198 ; 192 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 199 ; 195 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 200 ; 196 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 201 ; 197 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 202 ; ; 2 ; VCCIO2 ; power ; ; 3.3V ; -- ; ; -- ; -- ;
|
||||
; 203 ; 198 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 203 ; 198 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 204 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
|
||||
; 205 ; 199 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 206 ; 200 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 207 ; 201 ; 2 ; RESERVED_INPUT ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 205 ; 199 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 206 ; 200 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 207 ; 201 ; 2 ; GND* ; ; ; ; Column I/O ; ; no ; Off ;
|
||||
; 208 ; 202 ; 2 ; Y5 ; output ; 3.3-V LVTTL ; ; Column I/O ; N ; no ; Off ;
|
||||
+----------+------------+----------+------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
|
||||
Note: Pin directions (input, output or bidir) are based on device operating in user mode.
|
||||
@ -554,7 +553,7 @@ Note: User assignments will override these defaults. The user specified values a
|
||||
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+---------------------+--------------+
|
||||
; Compilation Hierarchy Node ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M4Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Full Hierarchy Name ; Library Name ;
|
||||
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+---------------------+--------------+
|
||||
; |data_selector ; 8 (8) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; 8 (8) ; 0 (0) ; 0 (0) ; |data_selector ; work ;
|
||||
; |double_selector_8b ; 8 (8) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; 8 (8) ; 0 (0) ; 0 (0) ; |double_selector_8b ; work ;
|
||||
+----------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+---------------------+--------------+
|
||||
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
|
||||
|
||||
@ -795,7 +794,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
|
||||
; Error detection CRC ; Off ;
|
||||
; nCEO ; As output driving ground ;
|
||||
; ASDO,nCSO ; As input tri-stated ;
|
||||
; Reserve all unused pins ; As input tri-stated ;
|
||||
; Reserve all unused pins ; As output driving ground ;
|
||||
; Base pin-out file on sameframe device ; Off ;
|
||||
+----------------------------------------------+--------------------------+
|
||||
|
||||
@ -911,10 +910,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
|
||||
Info: *******************************************************************
|
||||
Info: Running Quartus II Fitter
|
||||
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
Info: Processing started: Sun Mar 06 21:29:26 2022
|
||||
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off data_selector -c data_selector
|
||||
Info: Parallel compilation is enabled and will use 4 of the 6 processors detected
|
||||
Info: Selected device EP2C8Q208C8 for design "data_selector"
|
||||
Info: Processing started: Mon Mar 07 11:07:53 2022
|
||||
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b
|
||||
Info: Parallel compilation is enabled and will use 4 of the 4 processors detected
|
||||
Info: Selected device EP2C8Q208C8 for design "double_selector_8b"
|
||||
Info: Low junction temperature is 0 degrees C
|
||||
Info: High junction temperature is 85 degrees C
|
||||
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
|
||||
@ -967,7 +966,7 @@ Info: I/O bank details before I/O pin placement
|
||||
Info: I/O bank number 2 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 35 pins available
|
||||
Info: I/O bank number 3 does not use VREF pins and has undetermined VCCIO pins. 1 total pin(s) used -- 34 pins available
|
||||
Info: I/O bank number 4 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used -- 36 pins available
|
||||
Info: Fitter preparation operations ending: elapsed time is 00:00:01
|
||||
Info: Fitter preparation operations ending: elapsed time is 00:00:00
|
||||
Info: Fitter placement preparation operations beginning
|
||||
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
|
||||
Info: Fitter placement operations beginning
|
||||
@ -991,17 +990,18 @@ Warning: Found 8 output pins without output pin load capacitance assignment
|
||||
Info: Pin "Y6" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
|
||||
Info: Pin "Y7" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
|
||||
Info: Delay annotation completed successfully
|
||||
Info: Generated suppressed messages file D:/dev/quartus/data_selector/data_selector.fit.smsg
|
||||
Info: Quartus II Fitter was successful. 0 errors, 2 warnings
|
||||
Info: Peak virtual memory: 286 megabytes
|
||||
Info: Processing ended: Sun Mar 06 21:29:29 2022
|
||||
Info: Elapsed time: 00:00:03
|
||||
Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'.
|
||||
Info: Generated suppressed messages file D:/projects/quartus/double_selector_8b/double_selector_8b.fit.smsg
|
||||
Info: Quartus II Fitter was successful. 0 errors, 3 warnings
|
||||
Info: Peak virtual memory: 306 megabytes
|
||||
Info: Processing ended: Mon Mar 07 11:07:55 2022
|
||||
Info: Elapsed time: 00:00:02
|
||||
Info: Total CPU time (on all processors): 00:00:01
|
||||
|
||||
|
||||
+----------------------------+
|
||||
; Fitter Suppressed Messages ;
|
||||
+----------------------------+
|
||||
The suppressed messages can be found in D:/dev/quartus/data_selector/data_selector.fit.smsg.
|
||||
The suppressed messages can be found in D:/projects/quartus/double_selector_8b/double_selector_8b.fit.smsg.
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Fitter Status : Successful - Sun Mar 06 21:29:28 2022
|
||||
Fitter Status : Successful - Mon Mar 07 11:07:54 2022
|
||||
Quartus II Version : 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition
|
||||
Revision Name : data_selector
|
||||
Top-level Entity Name : data_selector
|
||||
Revision Name : double_selector_8b
|
||||
Top-level Entity Name : double_selector_8b
|
||||
Family : Cyclone II
|
||||
Device : EP2C8Q208C8
|
||||
Timing Models : Final
|
||||
@ -1,5 +1,5 @@
|
||||
Flow report for data_selector
|
||||
Sun Mar 06 21:30:44 2022
|
||||
Flow report for double_selector_8b
|
||||
Mon Mar 07 11:07:57 2022
|
||||
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
|
||||
|
||||
@ -38,10 +38,10 @@ applicable agreement for further details.
|
||||
+-----------------------------------------------------------------------------------+
|
||||
; Flow Summary ;
|
||||
+------------------------------------+----------------------------------------------+
|
||||
; Flow Status ; Successful - Sun Mar 06 21:30:44 2022 ;
|
||||
; Flow Status ; Successful - Mon Mar 07 11:07:57 2022 ;
|
||||
; Quartus II Version ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
|
||||
; Revision Name ; data_selector ;
|
||||
; Top-level Entity Name ; data_selector ;
|
||||
; Revision Name ; double_selector_8b ;
|
||||
; Top-level Entity Name ; double_selector_8b ;
|
||||
; Family ; Cyclone II ;
|
||||
; Device ; EP2C8Q208C8 ;
|
||||
; Timing Models ; Final ;
|
||||
@ -63,25 +63,24 @@ applicable agreement for further details.
|
||||
+-------------------+---------------------+
|
||||
; Option ; Setting ;
|
||||
+-------------------+---------------------+
|
||||
; Start date & time ; 03/06/2022 21:29:24 ;
|
||||
; Start date & time ; 03/07/2022 11:07:53 ;
|
||||
; Main task ; Compilation ;
|
||||
; Revision Name ; data_selector ;
|
||||
; Revision Name ; double_selector_8b ;
|
||||
+-------------------+---------------------+
|
||||
|
||||
|
||||
+-----------------------------------------------------------------------------------------------------------------------------------------+
|
||||
; Flow Non-Default Global Settings ;
|
||||
+------------------------------------+-----------------------------------------------------+---------------+-------------+----------------+
|
||||
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
|
||||
+------------------------------------+-----------------------------------------------------+---------------+-------------+----------------+
|
||||
; COMPILER_SIGNATURE_ID ; 136411542855513.164657336336460 ; -- ; -- ; -- ;
|
||||
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
|
||||
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
|
||||
; MISC_FILE ; D:/projects/quartus/data_selector/data_selector.dpf ; -- ; -- ; -- ;
|
||||
; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
|
||||
; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
|
||||
; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
|
||||
+------------------------------------+-----------------------------------------------------+---------------+-------------+----------------+
|
||||
+---------------------------------------------------------------------------------------------------------------------+
|
||||
; Flow Non-Default Global Settings ;
|
||||
+------------------------------------+---------------------------------+---------------+-------------+----------------+
|
||||
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
|
||||
+------------------------------------+---------------------------------+---------------+-------------+----------------+
|
||||
; COMPILER_SIGNATURE_ID ; 220283517943889.164662247222660 ; -- ; -- ; -- ;
|
||||
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
|
||||
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
|
||||
; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
|
||||
; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
|
||||
; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off ; -- ; -- ; eda_blast_fpga ;
|
||||
+------------------------------------+---------------------------------+---------------+-------------+----------------+
|
||||
|
||||
|
||||
+-----------------------------------------------------------------------------------------------------------------------------+
|
||||
@ -89,11 +88,11 @@ applicable agreement for further details.
|
||||
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
||||
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
|
||||
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
||||
; Analysis & Synthesis ; 00:00:01 ; 1.0 ; 226 MB ; 00:00:01 ;
|
||||
; Fitter ; 00:00:02 ; 1.0 ; 286 MB ; 00:00:01 ;
|
||||
; Assembler ; 00:00:01 ; 1.0 ; 221 MB ; 00:00:01 ;
|
||||
; Classic Timing Analyzer ; 00:00:00 ; 1.0 ; 178 MB ; 00:00:00 ;
|
||||
; Total ; 00:00:04 ; -- ; -- ; 00:00:03 ;
|
||||
; Analysis & Synthesis ; 00:00:01 ; 1.0 ; 245 MB ; 00:00:00 ;
|
||||
; Fitter ; 00:00:01 ; 1.0 ; 306 MB ; 00:00:01 ;
|
||||
; Assembler ; 00:00:01 ; 1.0 ; 241 MB ; 00:00:00 ;
|
||||
; Classic Timing Analyzer ; 00:00:00 ; 1.0 ; 198 MB ; 00:00:00 ;
|
||||
; Total ; 00:00:03 ; -- ; -- ; 00:00:01 ;
|
||||
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
|
||||
|
||||
|
||||
@ -102,21 +101,20 @@ applicable agreement for further details.
|
||||
+-------------------------+------------------+---------------+------------+----------------+
|
||||
; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
|
||||
+-------------------------+------------------+---------------+------------+----------------+
|
||||
; Analysis & Synthesis ; DESKTOP-G0CBSMT ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
; Fitter ; DESKTOP-G0CBSMT ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
; Assembler ; DESKTOP-G0CBSMT ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
; Classic Timing Analyzer ; DESKTOP-G0CBSMT ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
; Analysis & Synthesis ; Polyphony ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
; Fitter ; Polyphony ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
; Assembler ; Polyphony ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
; Classic Timing Analyzer ; Polyphony ; Windows Vista ; 6.2 ; x86_64 ;
|
||||
+-------------------------+------------------+---------------+------------+----------------+
|
||||
|
||||
|
||||
------------
|
||||
; Flow Log ;
|
||||
------------
|
||||
quartus_map --read_settings_files=on --write_settings_files=off data_selector -c data_selector
|
||||
quartus_fit --read_settings_files=off --write_settings_files=off data_selector -c data_selector
|
||||
quartus_asm --read_settings_files=off --write_settings_files=off data_selector -c data_selector
|
||||
quartus_tan --read_settings_files=off --write_settings_files=off data_selector -c data_selector --timing_analysis_only
|
||||
quartus_eda --read_settings_files=on --write_settings_files=off data_selector -c data_selector
|
||||
quartus_map --read_settings_files=on --write_settings_files=off double_selector_8b -c double_selector_8b
|
||||
quartus_fit --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b
|
||||
quartus_asm --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b
|
||||
quartus_tan --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b --timing_analysis_only
|
||||
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
Analysis & Synthesis report for data_selector
|
||||
Sun Mar 06 21:29:25 2022
|
||||
Analysis & Synthesis report for double_selector_8b
|
||||
Mon Mar 07 11:07:53 2022
|
||||
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
|
||||
|
||||
@ -39,10 +39,10 @@ applicable agreement for further details.
|
||||
+-----------------------------------------------------------------------------------+
|
||||
; Analysis & Synthesis Summary ;
|
||||
+------------------------------------+----------------------------------------------+
|
||||
; Analysis & Synthesis Status ; Successful - Sun Mar 06 21:29:25 2022 ;
|
||||
; Analysis & Synthesis Status ; Successful - Mon Mar 07 11:07:53 2022 ;
|
||||
; Quartus II Version ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
|
||||
; Revision Name ; data_selector ;
|
||||
; Top-level Entity Name ; data_selector ;
|
||||
; Revision Name ; double_selector_8b ;
|
||||
; Top-level Entity Name ; double_selector_8b ;
|
||||
; Family ; Cyclone II ;
|
||||
; Total logic elements ; 8 ;
|
||||
; Total combinational functions ; 8 ;
|
||||
@ -62,7 +62,7 @@ applicable agreement for further details.
|
||||
; Option ; Setting ; Default Value ;
|
||||
+--------------------------------------------------------------+--------------------+--------------------+
|
||||
; Device ; EP2C8Q208C8 ; ;
|
||||
; Top-level entity name ; data_selector ; data_selector ;
|
||||
; Top-level entity name ; double_selector_8b ; double_selector_8b ;
|
||||
; Family name ; Cyclone II ; Stratix II ;
|
||||
; Use Generated Physical Constraints File ; Off ; ;
|
||||
; Use smart compilation ; Off ; Off ;
|
||||
@ -131,13 +131,13 @@ applicable agreement for further details.
|
||||
+--------------------------------------------------------------+--------------------+--------------------+
|
||||
|
||||
|
||||
+------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
; Analysis & Synthesis Source Files Read ;
|
||||
+----------------------------------+-----------------+------------------------------------+------------------------------------------------+
|
||||
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
|
||||
+----------------------------------+-----------------+------------------------------------+------------------------------------------------+
|
||||
; data_selector.bdf ; yes ; User Block Diagram/Schematic File ; D:/dev/quartus/data_selector/data_selector.bdf ;
|
||||
+----------------------------------+-----------------+------------------------------------+------------------------------------------------+
|
||||
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
; Analysis & Synthesis Source Files Read ;
|
||||
+----------------------------------+-----------------+------------------------------------+---------------------------------------------------------------+
|
||||
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
|
||||
+----------------------------------+-----------------+------------------------------------+---------------------------------------------------------------+
|
||||
; double_selector_8b.bdf ; yes ; User Block Diagram/Schematic File ; D:/projects/quartus/double_selector_8b/double_selector_8b.bdf ;
|
||||
+----------------------------------+-----------------+------------------------------------+---------------------------------------------------------------+
|
||||
|
||||
|
||||
+-----------------------------------------------------+
|
||||
@ -174,7 +174,7 @@ applicable agreement for further details.
|
||||
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
|
||||
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
|
||||
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
|
||||
; |data_selector ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; |data_selector ; work ;
|
||||
; |double_selector_8b ; 8 (8) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 26 ; 0 ; |double_selector_8b ; work ;
|
||||
+----------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+---------------------+--------------+
|
||||
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
|
||||
|
||||
@ -200,19 +200,19 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
|
||||
Info: *******************************************************************
|
||||
Info: Running Quartus II Analysis & Synthesis
|
||||
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
Info: Processing started: Sun Mar 06 21:29:23 2022
|
||||
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off data_selector -c data_selector
|
||||
Info: Found 1 design units, including 1 entities, in source file data_selector.bdf
|
||||
Info: Found entity 1: data_selector
|
||||
Info: Elaborating entity "data_selector" for the top level hierarchy
|
||||
Info: Processing started: Mon Mar 07 11:07:52 2022
|
||||
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off double_selector_8b -c double_selector_8b
|
||||
Info: Found 1 design units, including 1 entities, in source file double_selector_8b.bdf
|
||||
Info: Found entity 1: double_selector_8b
|
||||
Info: Elaborating entity "double_selector_8b" for the top level hierarchy
|
||||
Info: Implemented 34 device resources after synthesis - the final resource count might be different
|
||||
Info: Implemented 18 input pins
|
||||
Info: Implemented 8 output pins
|
||||
Info: Implemented 8 logic cells
|
||||
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
|
||||
Info: Peak virtual memory: 230 megabytes
|
||||
Info: Processing ended: Sun Mar 06 21:29:25 2022
|
||||
Info: Elapsed time: 00:00:02
|
||||
Info: Total CPU time (on all processors): 00:00:01
|
||||
Info: Peak virtual memory: 248 megabytes
|
||||
Info: Processing ended: Mon Mar 07 11:07:53 2022
|
||||
Info: Elapsed time: 00:00:01
|
||||
Info: Total CPU time (on all processors): 00:00:00
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Analysis & Synthesis Status : Successful - Sun Mar 06 21:29:25 2022
|
||||
Analysis & Synthesis Status : Successful - Mon Mar 07 11:07:53 2022
|
||||
Quartus II Version : 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition
|
||||
Revision Name : data_selector
|
||||
Top-level Entity Name : data_selector
|
||||
Revision Name : double_selector_8b
|
||||
Top-level Entity Name : double_selector_8b
|
||||
Family : Cyclone II
|
||||
Total logic elements : 8
|
||||
Total combinational functions : 8
|
||||
@ -64,23 +64,23 @@
|
||||
---------------------------------------------------------------------------------
|
||||
|
||||
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
CHIP "data_selector" ASSIGNED TO AN: EP2C8Q208C8
|
||||
CHIP "double_selector_8b" ASSIGNED TO AN: EP2C8Q208C8
|
||||
|
||||
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
|
||||
-------------------------------------------------------------------------------------------------------------
|
||||
~ASDO~ / RESERVED_INPUT_WITH_WEAK_PULLUP : 1 : input : 3.3-V LVTTL : : 1 : N
|
||||
~nCSO~ / RESERVED_INPUT_WITH_WEAK_PULLUP : 2 : input : 3.3-V LVTTL : : 1 : N
|
||||
a7 : 3 : input : 3.3-V LVTTL : : 1 : N
|
||||
RESERVED_INPUT : 4 : : : : 1 :
|
||||
RESERVED_INPUT : 5 : : : : 1 :
|
||||
RESERVED_INPUT : 6 : : : : 1 :
|
||||
GND* : 4 : : : : 1 :
|
||||
GND* : 5 : : : : 1 :
|
||||
GND* : 6 : : : : 1 :
|
||||
VCCIO1 : 7 : power : : 3.3V : 1 :
|
||||
RESERVED_INPUT : 8 : : : : 1 :
|
||||
GND* : 8 : : : : 1 :
|
||||
GND : 9 : gnd : : : :
|
||||
Y4 : 10 : output : 3.3-V LVTTL : : 1 : N
|
||||
RESERVED_INPUT : 11 : : : : 1 :
|
||||
GND* : 11 : : : : 1 :
|
||||
a4 : 12 : input : 3.3-V LVTTL : : 1 : N
|
||||
RESERVED_INPUT : 13 : : : : 1 :
|
||||
GND* : 13 : : : : 1 :
|
||||
Y2 : 14 : output : 3.3-V LVTTL : : 1 : N
|
||||
Y3 : 15 : output : 3.3-V LVTTL : : 1 : N
|
||||
TDO : 16 : output : : : 1 :
|
||||
@ -110,11 +110,11 @@ a0 : 39 : input : 3.3-V LVTTL :
|
||||
b0 : 40 : input : 3.3-V LVTTL : : 1 : N
|
||||
b4 : 41 : input : 3.3-V LVTTL : : 1 : N
|
||||
VCCIO1 : 42 : power : : 3.3V : 1 :
|
||||
RESERVED_INPUT : 43 : : : : 1 :
|
||||
GND* : 43 : : : : 1 :
|
||||
BY : 44 : input : 3.3-V LVTTL : : 1 : N
|
||||
b5 : 45 : input : 3.3-V LVTTL : : 1 : N
|
||||
RESERVED_INPUT : 46 : : : : 1 :
|
||||
RESERVED_INPUT : 47 : : : : 1 :
|
||||
GND* : 46 : : : : 1 :
|
||||
GND* : 47 : : : : 1 :
|
||||
Y7 : 48 : output : 3.3-V LVTTL : : 1 : N
|
||||
GND : 49 : gnd : : : :
|
||||
GND_PLL1 : 50 : gnd : : : :
|
||||
@ -127,65 +127,65 @@ AY : 56 : input : 3.3-V LVTTL :
|
||||
b6 : 57 : input : 3.3-V LVTTL : : 4 : N
|
||||
Y0 : 58 : output : 3.3-V LVTTL : : 4 : N
|
||||
b3 : 59 : input : 3.3-V LVTTL : : 4 : N
|
||||
RESERVED_INPUT : 60 : : : : 4 :
|
||||
RESERVED_INPUT : 61 : : : : 4 :
|
||||
GND* : 60 : : : : 4 :
|
||||
GND* : 61 : : : : 4 :
|
||||
VCCIO4 : 62 : power : : 3.3V : 4 :
|
||||
RESERVED_INPUT : 63 : : : : 4 :
|
||||
RESERVED_INPUT : 64 : : : : 4 :
|
||||
GND* : 63 : : : : 4 :
|
||||
GND* : 64 : : : : 4 :
|
||||
GND : 65 : gnd : : : :
|
||||
VCCINT : 66 : power : : 1.2V : :
|
||||
RESERVED_INPUT : 67 : : : : 4 :
|
||||
RESERVED_INPUT : 68 : : : : 4 :
|
||||
RESERVED_INPUT : 69 : : : : 4 :
|
||||
RESERVED_INPUT : 70 : : : : 4 :
|
||||
GND* : 67 : : : : 4 :
|
||||
GND* : 68 : : : : 4 :
|
||||
GND* : 69 : : : : 4 :
|
||||
GND* : 70 : : : : 4 :
|
||||
VCCIO4 : 71 : power : : 3.3V : 4 :
|
||||
RESERVED_INPUT : 72 : : : : 4 :
|
||||
GND* : 72 : : : : 4 :
|
||||
GND : 73 : gnd : : : :
|
||||
RESERVED_INPUT : 74 : : : : 4 :
|
||||
RESERVED_INPUT : 75 : : : : 4 :
|
||||
RESERVED_INPUT : 76 : : : : 4 :
|
||||
RESERVED_INPUT : 77 : : : : 4 :
|
||||
GND* : 74 : : : : 4 :
|
||||
GND* : 75 : : : : 4 :
|
||||
GND* : 76 : : : : 4 :
|
||||
GND* : 77 : : : : 4 :
|
||||
GND : 78 : gnd : : : :
|
||||
VCCINT : 79 : power : : 1.2V : :
|
||||
RESERVED_INPUT : 80 : : : : 4 :
|
||||
RESERVED_INPUT : 81 : : : : 4 :
|
||||
RESERVED_INPUT : 82 : : : : 4 :
|
||||
GND* : 80 : : : : 4 :
|
||||
GND* : 81 : : : : 4 :
|
||||
GND* : 82 : : : : 4 :
|
||||
VCCIO4 : 83 : power : : 3.3V : 4 :
|
||||
RESERVED_INPUT : 84 : : : : 4 :
|
||||
GND* : 84 : : : : 4 :
|
||||
GND : 85 : gnd : : : :
|
||||
RESERVED_INPUT : 86 : : : : 4 :
|
||||
RESERVED_INPUT : 87 : : : : 4 :
|
||||
RESERVED_INPUT : 88 : : : : 4 :
|
||||
RESERVED_INPUT : 89 : : : : 4 :
|
||||
RESERVED_INPUT : 90 : : : : 4 :
|
||||
GND* : 86 : : : : 4 :
|
||||
GND* : 87 : : : : 4 :
|
||||
GND* : 88 : : : : 4 :
|
||||
GND* : 89 : : : : 4 :
|
||||
GND* : 90 : : : : 4 :
|
||||
VCCIO4 : 91 : power : : 3.3V : 4 :
|
||||
RESERVED_INPUT : 92 : : : : 4 :
|
||||
GND* : 92 : : : : 4 :
|
||||
GND : 93 : gnd : : : :
|
||||
RESERVED_INPUT : 94 : : : : 4 :
|
||||
RESERVED_INPUT : 95 : : : : 4 :
|
||||
RESERVED_INPUT : 96 : : : : 4 :
|
||||
RESERVED_INPUT : 97 : : : : 4 :
|
||||
GND* : 94 : : : : 4 :
|
||||
GND* : 95 : : : : 4 :
|
||||
GND* : 96 : : : : 4 :
|
||||
GND* : 97 : : : : 4 :
|
||||
VCCIO4 : 98 : power : : 3.3V : 4 :
|
||||
RESERVED_INPUT : 99 : : : : 4 :
|
||||
GND* : 99 : : : : 4 :
|
||||
GND : 100 : gnd : : : :
|
||||
RESERVED_INPUT : 101 : : : : 4 :
|
||||
RESERVED_INPUT : 102 : : : : 4 :
|
||||
RESERVED_INPUT : 103 : : : : 4 :
|
||||
RESERVED_INPUT : 104 : : : : 4 :
|
||||
RESERVED_INPUT : 105 : : : : 3 :
|
||||
RESERVED_INPUT : 106 : : : : 3 :
|
||||
RESERVED_INPUT : 107 : : : : 3 :
|
||||
GND* : 101 : : : : 4 :
|
||||
GND* : 102 : : : : 4 :
|
||||
GND* : 103 : : : : 4 :
|
||||
GND* : 104 : : : : 4 :
|
||||
GND* : 105 : : : : 3 :
|
||||
GND* : 106 : : : : 3 :
|
||||
GND* : 107 : : : : 3 :
|
||||
~LVDS54p/nCEO~ : 108 : output : 3.3-V LVTTL : : 3 : N
|
||||
VCCIO3 : 109 : power : : 3.3V : 3 :
|
||||
RESERVED_INPUT : 110 : : : : 3 :
|
||||
GND* : 110 : : : : 3 :
|
||||
GND : 111 : gnd : : : :
|
||||
RESERVED_INPUT : 112 : : : : 3 :
|
||||
RESERVED_INPUT : 113 : : : : 3 :
|
||||
RESERVED_INPUT : 114 : : : : 3 :
|
||||
RESERVED_INPUT : 115 : : : : 3 :
|
||||
RESERVED_INPUT : 116 : : : : 3 :
|
||||
RESERVED_INPUT : 117 : : : : 3 :
|
||||
RESERVED_INPUT : 118 : : : : 3 :
|
||||
GND* : 112 : : : : 3 :
|
||||
GND* : 113 : : : : 3 :
|
||||
GND* : 114 : : : : 3 :
|
||||
GND* : 115 : : : : 3 :
|
||||
GND* : 116 : : : : 3 :
|
||||
GND* : 117 : : : : 3 :
|
||||
GND* : 118 : : : : 3 :
|
||||
GND : 119 : gnd : : : :
|
||||
VCCINT : 120 : power : : 1.2V : :
|
||||
nSTATUS : 121 : : : : 3 :
|
||||
@ -194,32 +194,32 @@ CONF_DONE : 123 : : :
|
||||
GND : 124 : gnd : : : :
|
||||
MSEL1 : 125 : : : : 3 :
|
||||
MSEL0 : 126 : : : : 3 :
|
||||
RESERVED_INPUT : 127 : : : : 3 :
|
||||
RESERVED_INPUT : 128 : : : : 3 :
|
||||
GND* : 127 : : : : 3 :
|
||||
GND* : 128 : : : : 3 :
|
||||
GND+ : 129 : : : : 3 :
|
||||
GND+ : 130 : : : : 3 :
|
||||
GND+ : 131 : : : : 3 :
|
||||
GND+ : 132 : : : : 3 :
|
||||
RESERVED_INPUT : 133 : : : : 3 :
|
||||
RESERVED_INPUT : 134 : : : : 3 :
|
||||
RESERVED_INPUT : 135 : : : : 3 :
|
||||
GND* : 133 : : : : 3 :
|
||||
GND* : 134 : : : : 3 :
|
||||
GND* : 135 : : : : 3 :
|
||||
VCCIO3 : 136 : power : : 3.3V : 3 :
|
||||
RESERVED_INPUT : 137 : : : : 3 :
|
||||
RESERVED_INPUT : 138 : : : : 3 :
|
||||
RESERVED_INPUT : 139 : : : : 3 :
|
||||
GND* : 137 : : : : 3 :
|
||||
GND* : 138 : : : : 3 :
|
||||
GND* : 139 : : : : 3 :
|
||||
GND : 140 : gnd : : : :
|
||||
RESERVED_INPUT : 141 : : : : 3 :
|
||||
RESERVED_INPUT : 142 : : : : 3 :
|
||||
RESERVED_INPUT : 143 : : : : 3 :
|
||||
RESERVED_INPUT : 144 : : : : 3 :
|
||||
RESERVED_INPUT : 145 : : : : 3 :
|
||||
RESERVED_INPUT : 146 : : : : 3 :
|
||||
RESERVED_INPUT : 147 : : : : 3 :
|
||||
GND* : 141 : : : : 3 :
|
||||
GND* : 142 : : : : 3 :
|
||||
GND* : 143 : : : : 3 :
|
||||
GND* : 144 : : : : 3 :
|
||||
GND* : 145 : : : : 3 :
|
||||
GND* : 146 : : : : 3 :
|
||||
GND* : 147 : : : : 3 :
|
||||
VCCIO3 : 148 : power : : 3.3V : 3 :
|
||||
RESERVED_INPUT : 149 : : : : 3 :
|
||||
RESERVED_INPUT : 150 : : : : 3 :
|
||||
RESERVED_INPUT : 151 : : : : 3 :
|
||||
RESERVED_INPUT : 152 : : : : 3 :
|
||||
GND* : 149 : : : : 3 :
|
||||
GND* : 150 : : : : 3 :
|
||||
GND* : 151 : : : : 3 :
|
||||
GND* : 152 : : : : 3 :
|
||||
GND : 153 : gnd : : : :
|
||||
GND_PLL2 : 154 : gnd : : : :
|
||||
VCCD_PLL2 : 155 : power : : 1.2V : :
|
||||
@ -227,52 +227,52 @@ GND_PLL2 : 156 : gnd : :
|
||||
VCCA_PLL2 : 157 : power : : 1.2V : :
|
||||
GNDA_PLL2 : 158 : gnd : : : :
|
||||
GND : 159 : gnd : : : :
|
||||
RESERVED_INPUT : 160 : : : : 2 :
|
||||
RESERVED_INPUT : 161 : : : : 2 :
|
||||
RESERVED_INPUT : 162 : : : : 2 :
|
||||
RESERVED_INPUT : 163 : : : : 2 :
|
||||
RESERVED_INPUT : 164 : : : : 2 :
|
||||
RESERVED_INPUT : 165 : : : : 2 :
|
||||
GND* : 160 : : : : 2 :
|
||||
GND* : 161 : : : : 2 :
|
||||
GND* : 162 : : : : 2 :
|
||||
GND* : 163 : : : : 2 :
|
||||
GND* : 164 : : : : 2 :
|
||||
GND* : 165 : : : : 2 :
|
||||
VCCIO2 : 166 : power : : 3.3V : 2 :
|
||||
GND : 167 : gnd : : : :
|
||||
RESERVED_INPUT : 168 : : : : 2 :
|
||||
RESERVED_INPUT : 169 : : : : 2 :
|
||||
RESERVED_INPUT : 170 : : : : 2 :
|
||||
RESERVED_INPUT : 171 : : : : 2 :
|
||||
GND* : 168 : : : : 2 :
|
||||
GND* : 169 : : : : 2 :
|
||||
GND* : 170 : : : : 2 :
|
||||
GND* : 171 : : : : 2 :
|
||||
VCCIO2 : 172 : power : : 3.3V : 2 :
|
||||
RESERVED_INPUT : 173 : : : : 2 :
|
||||
GND* : 173 : : : : 2 :
|
||||
GND : 174 : gnd : : : :
|
||||
RESERVED_INPUT : 175 : : : : 2 :
|
||||
RESERVED_INPUT : 176 : : : : 2 :
|
||||
GND* : 175 : : : : 2 :
|
||||
GND* : 176 : : : : 2 :
|
||||
GND : 177 : gnd : : : :
|
||||
VCCINT : 178 : power : : 1.2V : :
|
||||
RESERVED_INPUT : 179 : : : : 2 :
|
||||
RESERVED_INPUT : 180 : : : : 2 :
|
||||
RESERVED_INPUT : 181 : : : : 2 :
|
||||
RESERVED_INPUT : 182 : : : : 2 :
|
||||
GND* : 179 : : : : 2 :
|
||||
GND* : 180 : : : : 2 :
|
||||
GND* : 181 : : : : 2 :
|
||||
GND* : 182 : : : : 2 :
|
||||
VCCIO2 : 183 : power : : 3.3V : 2 :
|
||||
GND : 184 : gnd : : : :
|
||||
RESERVED_INPUT : 185 : : : : 2 :
|
||||
GND* : 185 : : : : 2 :
|
||||
GND : 186 : gnd : : : :
|
||||
RESERVED_INPUT : 187 : : : : 2 :
|
||||
RESERVED_INPUT : 188 : : : : 2 :
|
||||
RESERVED_INPUT : 189 : : : : 2 :
|
||||
GND* : 187 : : : : 2 :
|
||||
GND* : 188 : : : : 2 :
|
||||
GND* : 189 : : : : 2 :
|
||||
VCCINT : 190 : power : : 1.2V : :
|
||||
RESERVED_INPUT : 191 : : : : 2 :
|
||||
RESERVED_INPUT : 192 : : : : 2 :
|
||||
RESERVED_INPUT : 193 : : : : 2 :
|
||||
GND* : 191 : : : : 2 :
|
||||
GND* : 192 : : : : 2 :
|
||||
GND* : 193 : : : : 2 :
|
||||
VCCIO2 : 194 : power : : 3.3V : 2 :
|
||||
RESERVED_INPUT : 195 : : : : 2 :
|
||||
GND* : 195 : : : : 2 :
|
||||
GND : 196 : gnd : : : :
|
||||
RESERVED_INPUT : 197 : : : : 2 :
|
||||
RESERVED_INPUT : 198 : : : : 2 :
|
||||
RESERVED_INPUT : 199 : : : : 2 :
|
||||
RESERVED_INPUT : 200 : : : : 2 :
|
||||
RESERVED_INPUT : 201 : : : : 2 :
|
||||
GND* : 197 : : : : 2 :
|
||||
GND* : 198 : : : : 2 :
|
||||
GND* : 199 : : : : 2 :
|
||||
GND* : 200 : : : : 2 :
|
||||
GND* : 201 : : : : 2 :
|
||||
VCCIO2 : 202 : power : : 3.3V : 2 :
|
||||
RESERVED_INPUT : 203 : : : : 2 :
|
||||
GND* : 203 : : : : 2 :
|
||||
GND : 204 : gnd : : : :
|
||||
RESERVED_INPUT : 205 : : : : 2 :
|
||||
RESERVED_INPUT : 206 : : : : 2 :
|
||||
RESERVED_INPUT : 207 : : : : 2 :
|
||||
GND* : 205 : : : : 2 :
|
||||
GND* : 206 : : : : 2 :
|
||||
GND* : 207 : : : : 2 :
|
||||
Y5 : 208 : output : 3.3-V LVTTL : : 2 : N
|
||||
@ -18,13 +18,13 @@
|
||||
#
|
||||
# Quartus II
|
||||
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
# Date created = 19:48:38 March 05, 2022
|
||||
# Date created = 11:06:00 March 07, 2022
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
QUARTUS_VERSION = "9.0"
|
||||
DATE = "19:48:38 March 05, 2022"
|
||||
DATE = "11:06:00 March 07, 2022"
|
||||
|
||||
# Revisions
|
||||
|
||||
PROJECT_REVISION = "data_selector"
|
||||
PROJECT_REVISION = "double_selector_8b"
|
||||
@ -18,14 +18,14 @@
|
||||
#
|
||||
# Quartus II
|
||||
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
# Date created = 19:48:38 March 05, 2022
|
||||
# Date created = 11:06:00 March 07, 2022
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Notes:
|
||||
#
|
||||
# 1) The default values for assignments are stored in the file:
|
||||
# data_selector_assignment_defaults.qdf
|
||||
# double_selector_8b_assignment_defaults.qdf
|
||||
# If this file doesn't exist, see file:
|
||||
# assignment_defaults.qdf
|
||||
#
|
||||
@ -38,20 +38,16 @@
|
||||
|
||||
set_global_assignment -name FAMILY "Cyclone II"
|
||||
set_global_assignment -name DEVICE EP2C8Q208C8
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY data_selector
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY double_selector_8b
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:48:38 MARCH 05, 2022"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:06:00 MARCH 07, 2022"
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
|
||||
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
|
||||
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
||||
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
||||
set_global_assignment -name BDF_FILE data_selector.bdf
|
||||
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
|
||||
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
|
||||
set_global_assignment -name BDF_FILE double_selector_8b.bdf
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
|
||||
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
|
||||
set_global_assignment -name MISC_FILE "D:/projects/quartus/data_selector/data_selector.dpf"
|
||||
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
|
||||
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
|
||||
@ -1,5 +1,5 @@
|
||||
Classic Timing Analyzer report for data_selector
|
||||
Sun Mar 06 21:29:32 2022
|
||||
Classic Timing Analyzer report for double_selector_8b
|
||||
Mon Mar 07 11:07:57 2022
|
||||
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
|
||||
|
||||
@ -81,7 +81,7 @@ applicable agreement for further details.
|
||||
+----------------------------+-------------+
|
||||
; Processors ; Number ;
|
||||
+----------------------------+-------------+
|
||||
; Number detected on machine ; 6 ;
|
||||
; Number detected on machine ; 4 ;
|
||||
; Maximum allowed ; 4 ;
|
||||
; ; ;
|
||||
; Average used ; 1.00 ;
|
||||
@ -89,7 +89,7 @@ applicable agreement for further details.
|
||||
; ; ;
|
||||
; Usage by Processor ; % Time Used ;
|
||||
; 1 processor ; 100.0% ;
|
||||
; 2-6 processors ; 0.0% ;
|
||||
; 2-4 processors ; 0.0% ;
|
||||
+----------------------------+-------------+
|
||||
|
||||
|
||||
@ -139,9 +139,9 @@ applicable agreement for further details.
|
||||
Info: *******************************************************************
|
||||
Info: Running Quartus II Classic Timing Analyzer
|
||||
Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
|
||||
Info: Processing started: Sun Mar 06 21:29:32 2022
|
||||
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off data_selector -c data_selector --timing_analysis_only
|
||||
Info: Parallel compilation is enabled and will use 4 of the 6 processors detected
|
||||
Info: Processing started: Mon Mar 07 11:07:57 2022
|
||||
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off double_selector_8b -c double_selector_8b --timing_analysis_only
|
||||
Info: Parallel compilation is enabled and will use 4 of the 4 processors detected
|
||||
Info: Longest tpd from source pin "b5" to destination pin "Y5" is 12.694 ns
|
||||
Info: 1: + IC(0.000 ns) + CELL(0.995 ns) = 0.995 ns; Loc. = PIN_45; Fanout = 1; PIN Node = 'b5'
|
||||
Info: 2: + IC(6.147 ns) + CELL(0.624 ns) = 7.766 ns; Loc. = LCCOMB_X1_Y9_N26; Fanout = 1; COMB Node = 'inst6'
|
||||
@ -149,8 +149,8 @@ Info: Longest tpd from source pin "b5" to destination pin "Y5" is 12.694 ns
|
||||
Info: Total cell delay = 4.905 ns ( 38.64 % )
|
||||
Info: Total interconnect delay = 7.789 ns ( 61.36 % )
|
||||
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings
|
||||
Info: Peak virtual memory: 192 megabytes
|
||||
Info: Processing ended: Sun Mar 06 21:29:32 2022
|
||||
Info: Peak virtual memory: 212 megabytes
|
||||
Info: Processing ended: Mon Mar 07 11:07:57 2022
|
||||
Info: Elapsed time: 00:00:00
|
||||
Info: Total CPU time (on all processors): 00:00:00
|
||||
|
||||
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