83 次程式碼提交

作者 SHA1 備註 日期
11bfd0c1e6 修改寄存器组 2022-04-07 16:47:37 +08:00
e9de2bc8a9 Merge branch 'master' of https://git.sduonline.cn/juzheng/quartus 2022-04-07 16:18:57 +08:00
a30b0494ef 添加8位四选一选择器 2022-04-07 16:18:53 +08:00
36d5bedf8f Merge branch 'master' of https://git.sduonline.cn/juzheng/quartus 2022-04-07 15:50:45 +08:00
85c641f4cf 添加笔记 2022-04-07 15:50:30 +08:00
fc3da88f19 完善B寄存器的功能,删去A寄存器的组合逻辑思路,完成程序状态字的判断电路 2022-04-07 15:40:25 +08:00
69262dc207 添加输入分组的三选一符号 2022-04-07 15:35:09 +08:00
1bdd55d75f upgrade single adder to ALU with adder & shifter 2022-04-01 09:59:39 +08:00
6d6bce4487 完善微指令内容 2022-03-31 22:34:12 +08:00
2063d476b9 啥都没干哼哼 2022-03-31 17:35:05 +08:00
68e10b4fd1 优化ALU电路结构 2022-03-31 17:27:15 +08:00
00bbf8b267 add 24_decoder 2022-03-31 15:11:28 +08:00
fc7e5d5807 move asdf 2022-03-30 08:41:24 +08:00
6b95f93bc0 update machine 2022-03-29 17:10:33 +08:00
cf71b49ea6 create machine_alpha 2022-03-29 16:52:11 +08:00
f589e4fc86 add register_8b_premium 2022-03-29 16:34:13 +08:00
2dd691bf99 add register 4x 2022-03-29 15:02:17 +08:00
da8478ff9a rename for machine_alpha 2022-03-29 14:38:35 +08:00
wzh
4df19e69b9 change CPRn pin 2022-03-24 18:36:24 +08:00
ff09c80b84 assign pins & add debug output 2022-03-24 17:01:43 +08:00
2124929b45 Add NOT gate on CPs 2022-03-24 16:24:00 +08:00
78337c6f7a Add PC_uIR and uRDN 2022-03-24 14:25:56 +08:00
a8dd3f0217 Finish uPC and whole design of RAM project 2022-03-21 16:15:14 +08:00
e5315fad02 Finish RAM project without setting uPC and pin settings 2022-03-17 21:19:47 +08:00
eceb1b13d4 set up project of start_circuit and copy it to ram project 2022-03-17 20:27:34 +08:00
978edd39d6 add start_circuit 2022-03-17 20:16:00 +08:00
96a90da2bc create microprogram_ram 2022-03-17 20:06:56 +08:00
13b88836ec add register 8b with switch 2022-03-17 19:25:16 +08:00
4720fabd9e Revert "change CPR sequence"
This reverts commit d84feeaa3e494c54c75def74f0b38c5a724f4406.
2022-03-17 18:38:08 +08:00
d84feeaa3e change CPR sequence 2022-03-17 18:33:56 +08:00
122a026579 reassign pins 2022-03-17 18:22:36 +08:00
38e9372ffd fix ALU parallel 2022-03-17 18:11:14 +08:00
e768b24024 clean unstaged 2022-03-17 17:16:21 +08:00
7ee857af1a fix ALU CLR 2022-03-17 17:03:49 +08:00
0c20d9cbf6 assign pins for microprogram_adder 2022-03-17 17:00:20 +08:00
6cc21b28d2 add mciroprogram_adder 2022-03-17 16:49:23 +08:00
4be3687702 Merge branch 'master' of https://git.sduonline.cn/juzheng/quartus 2022-03-17 16:35:59 +08:00
07ad3a25d3 stash microprogram_adder 2022-03-17 16:35:54 +08:00
65d1ef1509 完成新的ALU 2022-03-17 16:34:02 +08:00
8a36eb2b64 swap As and Bs 2022-03-10 21:14:58 +08:00
4f25cc8391 add adder_suber_8b 2022-03-10 21:06:06 +08:00
be08431cd1 update README 2022-03-10 20:25:15 +08:00
08af02b861 assign pins for shiftable_register 2022-03-10 20:25:05 +08:00
4a00bfd2ab add global not to ALU 2022-03-10 19:46:09 +08:00
5f71b7a453 revert S0~S3 alteration for ALU 2022-03-10 19:07:02 +08:00
31d0b7a45b add two more pins for shifter 8b 2022-03-10 18:55:24 +08:00
1a52d77c41 assign pins for counter 8b with input 2022-03-10 18:33:00 +08:00
5e01908d34 add 八位PC 2022-03-10 17:26:23 +08:00
48c03e7b26 添加移位器依赖,更新移位器原理图 2022-03-10 17:08:08 +08:00
6d9c3008cd Merge branch 'master' of https://git.sduonline.cn/juzheng/quartus 2022-03-10 17:04:40 +08:00