quartus/double_selector_8b/double_selector_8b.qsf

83 行
3.8 KiB
Plaintext

# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2009 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
# Date created = 11:06:00 March 07, 2022
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# double_selector_8b_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C8Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY double_selector_8b
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:06:00 MARCH 07, 2022"
set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name BDF_FILE double_selector_8b.bdf
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_77 -to a0
set_location_assignment PIN_80 -to a1
set_location_assignment PIN_81 -to a2
set_location_assignment PIN_82 -to a3
set_location_assignment PIN_84 -to a4
set_location_assignment PIN_86 -to a5
set_location_assignment PIN_87 -to a6
set_location_assignment PIN_88 -to a7
set_location_assignment PIN_67 -to b0
set_location_assignment PIN_68 -to b1
set_location_assignment PIN_69 -to b2
set_location_assignment PIN_70 -to b3
set_location_assignment PIN_72 -to b4
set_location_assignment PIN_74 -to b5
set_location_assignment PIN_75 -to b6
set_location_assignment PIN_76 -to b7
set_location_assignment PIN_23 -to AY
set_location_assignment PIN_24 -to BY
set_location_assignment PIN_142 -to Y0
set_location_assignment PIN_143 -to Y1
set_location_assignment PIN_144 -to Y2
set_location_assignment PIN_145 -to Y3
set_location_assignment PIN_146 -to Y4
set_location_assignment PIN_147 -to Y5
set_location_assignment PIN_149 -to Y6
set_location_assignment PIN_150 -to Y7
set_global_assignment -name MISC_FILE "D:/projects/quartus/double_selector_8b/double_selector_8b.dpf"
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"