add triple_selector_8b, shifter_8b
此提交包含在:
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 10:24:28 2022 " "Info: Processing started: Mon Mar 07 10:24:28 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off triple_selector_8b -c triple_selector_8b " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off triple_selector_8b -c triple_selector_8b" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
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{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Info: Writing out detailed assembly data for power analysis" { } { } 0 0 "Writing out detailed assembly data for power analysis" 0 0 "" 0 -1}
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{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Info: Assembler is generating device programming files" { } { } 0 0 "Assembler is generating device programming files" 0 0 "" 0 -1}
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{ "Info" "IPGMIO_CONDONE_ERROR_CHECKS_DISABLED" "" "Info: The Active Serial/Parallel mode CONF_DONE pin error check is disabled" { } { } 0 0 "The Active Serial/Parallel mode CONF_DONE pin error check is disabled" 0 0 "" 0 -1}
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{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "242 " "Info: Peak virtual memory: 242 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 10:24:29 2022 " "Info: Processing ended: Mon Mar 07 10:24:29 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
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<?xml version="1.0" ?>
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<LOG_ROOT>
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<PROJECT NAME="triple_selector_8b">
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</PROJECT>
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</LOG_ROOT>
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<kpt_db name="triple_selector_8b.cmp" kpt_version="1.1">
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<key_points_set type="reference" hier_sep="|">
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</key_points_set>
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<key_points_set type="transition" hier_sep="|">
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</key_points_set>
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<key_points_set type="transformed" hier_sep="|">
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</key_points_set>
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<transformations_set hier_sep="|">
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</transformations_set>
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</kpt_db>
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v1
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<kpt_db name="triple_selector_8b.cmp_merge" kpt_version="1.1">
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<key_points_set type="reference" hier_sep="|">
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</key_points_set>
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<key_points_set type="transition" hier_sep="|">
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</key_points_set>
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<key_points_set type="transformed" hier_sep="|">
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</key_points_set>
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<transformations_set hier_sep="|">
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</transformations_set>
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</kpt_db>
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Quartus_Version = Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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Version_Index = 167832322
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Creation_Time = Mon Mar 07 10:23:46 2022
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|triple_selector_8b
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Y0 <= inst3.DB_MAX_OUTPUT_PORT_TYPE
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B0 => inst1.IN0
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BY => inst1.IN1
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BY => inst5.IN1
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BY => inst9.IN1
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BY => inst13.IN1
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BY => inst16.IN1
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BY => inst21.IN1
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BY => inst24.IN1
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BY => inst29.IN1
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C0 => inst2.IN0
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CY => inst2.IN1
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CY => inst6.IN1
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CY => inst10.IN1
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CY => inst14.IN1
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CY => inst18.IN1
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CY => inst22.IN1
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CY => inst26.IN1
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CY => inst30.IN1
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A0 => inst.IN0
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AY => inst.IN1
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AY => inst4.IN1
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AY => inst8.IN1
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AY => inst12.IN1
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AY => inst17.IN1
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AY => inst20.IN1
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AY => inst25.IN1
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AY => inst28.IN1
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Y1 <= inst7.DB_MAX_OUTPUT_PORT_TYPE
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B1 => inst5.IN0
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C1 => inst6.IN0
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A1 => inst4.IN0
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Y2 <= inst11.DB_MAX_OUTPUT_PORT_TYPE
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B2 => inst9.IN0
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C2 => inst10.IN0
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A2 => inst8.IN0
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Y3 <= inst15.DB_MAX_OUTPUT_PORT_TYPE
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B3 => inst13.IN0
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C3 => inst14.IN0
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A3 => inst12.IN0
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Y4 <= inst19.DB_MAX_OUTPUT_PORT_TYPE
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B4 => inst16.IN0
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C4 => inst18.IN0
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A4 => inst17.IN0
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Y5 <= inst23.DB_MAX_OUTPUT_PORT_TYPE
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B5 => inst21.IN0
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C5 => inst22.IN0
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A5 => inst20.IN0
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Y6 <= inst27.DB_MAX_OUTPUT_PORT_TYPE
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B6 => inst24.IN0
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C6 => inst26.IN0
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A6 => inst25.IN0
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Y7 <= inst31.DB_MAX_OUTPUT_PORT_TYPE
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B7 => inst29.IN0
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C7 => inst30.IN0
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A7 => inst28.IN0
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Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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11
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936
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OFF
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OFF
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OFF
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ON
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ON
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ON
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FV_OFF
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Level2
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0
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0
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VRSM_ON
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VHSM_ON
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0
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-- Start Library Paths --
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-- End Library Paths --
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-- Start VHDL Libraries --
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-- End VHDL Libraries --
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# entity
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triple_selector_8b
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# storage
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db|triple_selector_8b.(0).cnf
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db|triple_selector_8b.(0).cnf
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# case_insensitive
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# source_file
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triple_selector_8b.bdf
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91b7a41e9ebd47591ce44c4793a9f2e
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26
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# internal_option {
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BLOCK_DESIGN_NAMING
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AUTO
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}
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# hierarchies {
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}
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# macro_sequence
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# end
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# complete
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<TABLE BORDER="1" cellspacing="1" cellpadding="2">
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<TR valign="middle" bgcolor="#C0C0C0">
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<TH>Hierarchy</TH>
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<TH>Input</TH>
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<TH>Constant Input</TH>
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<TH>Unused Input</TH>
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<TH>Floating Input</TH>
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<TH>Output</TH>
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<TH>Constant Output</TH>
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<TH>Unused Output</TH>
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<TH>Floating Output</TH>
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<TH>Bidir</TH>
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<TH>Constant Bidir</TH>
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<TH>Unused Bidir</TH>
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<TH>Input only Bidir</TH>
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||||
<TH>Output only Bidir</TH>
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||||
</TR>
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||||
</TABLE>
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Legal Partition Candidates ;
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||||
+-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
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; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
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+-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
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<kpt_db name="triple_selector_8b.map" kpt_version="1.1">
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<key_points_set type="reference" hier_sep="/">
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||||
</key_points_set>
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||||
<key_points_set type="transition" hier_sep="|">
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||||
</key_points_set>
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||||
<key_points_set type="transformed" hier_sep="|">
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||||
</key_points_set>
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||||
<transformations_set hier_sep="|">
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||||
</transformations_set>
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||||
</kpt_db>
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v1
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 10:24:25 2022 " "Info: Processing started: Mon Mar 07 10:24:25 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off triple_selector_8b -c triple_selector_8b " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off triple_selector_8b -c triple_selector_8b" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "triple_selector_8b.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file triple_selector_8b.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 triple_selector_8b " "Info: Found entity 1: triple_selector_8b" { } { { "triple_selector_8b.bdf" "" { Schematic "D:/projects/quartus/triple_selector_8b/triple_selector_8b.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "ISGN_START_ELABORATION_TOP" "triple_selector_8b " "Info: Elaborating entity \"triple_selector_8b\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
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||||
{ "Info" "ICUT_CUT_TM_SUMMARY" "51 " "Info: Implemented 51 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "27 " "Info: Implemented 27 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "8 " "Info: Implemented 8 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "16 " "Info: Implemented 16 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "249 " "Info: Peak virtual memory: 249 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 10:24:26 2022 " "Info: Processing ended: Mon Mar 07 10:24:26 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
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v1
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition " "Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 07 10:24:29 2022 " "Info: Processing started: Mon Mar 07 10:24:29 2022" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off triple_selector_8b -c triple_selector_8b --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off triple_selector_8b -c triple_selector_8b --timing_analysis_only" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
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||||
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Info: Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
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||||
{ "Info" "ITDB_FULL_TPD_RESULT" "BY Y6 16.101 ns Longest " "Info: Longest tpd from source pin \"BY\" to destination pin \"Y6\" is 16.101 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.985 ns) 0.985 ns BY 1 PIN PIN_31 8 " "Info: 1: + IC(0.000 ns) + CELL(0.985 ns) = 0.985 ns; Loc. = PIN_31; Fanout = 8; PIN Node = 'BY'" { } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { BY } "NODE_NAME" } } { "triple_selector_8b.bdf" "" { Schematic "D:/projects/quartus/triple_selector_8b/triple_selector_8b.bdf" { { 1320 16 184 1336 "BY" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(6.949 ns) + CELL(0.651 ns) 8.585 ns inst27~0 2 COMB LCCOMB_X33_Y11_N0 1 " "Info: 2: + IC(6.949 ns) + CELL(0.651 ns) = 8.585 ns; Loc. = LCCOMB_X33_Y11_N0; Fanout = 1; COMB Node = 'inst27~0'" { } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "7.600 ns" { BY inst27~0 } "NODE_NAME" } } { "triple_selector_8b.bdf" "" { Schematic "D:/projects/quartus/triple_selector_8b/triple_selector_8b.bdf" { { 208 488 552 256 "inst27" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.366 ns) + CELL(0.624 ns) 9.575 ns inst27 3 COMB LCCOMB_X33_Y11_N10 1 " "Info: 3: + IC(0.366 ns) + CELL(0.624 ns) = 9.575 ns; Loc. = LCCOMB_X33_Y11_N10; Fanout = 1; COMB Node = 'inst27'" { } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "0.990 ns" { inst27~0 inst27 } "NODE_NAME" } } { "triple_selector_8b.bdf" "" { Schematic "D:/projects/quartus/triple_selector_8b/triple_selector_8b.bdf" { { 208 488 552 256 "inst27" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(3.430 ns) + CELL(3.096 ns) 16.101 ns Y6 4 PIN PIN_30 0 " "Info: 4: + IC(3.430 ns) + CELL(3.096 ns) = 16.101 ns; Loc. = PIN_30; Fanout = 0; PIN Node = 'Y6'" { } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "6.526 ns" { inst27 Y6 } "NODE_NAME" } } { "triple_selector_8b.bdf" "" { Schematic "D:/projects/quartus/triple_selector_8b/triple_selector_8b.bdf" { { 224 600 776 240 "Y6" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.356 ns ( 33.27 % ) " "Info: Total cell delay = 5.356 ns ( 33.27 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "10.745 ns ( 66.73 % ) " "Info: Total interconnect delay = 10.745 ns ( 66.73 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1} } { { "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/90sp2/quartus/bin/TimingClosureFloorplan.fld" "" "16.101 ns" { BY inst27~0 inst27 Y6 } "NODE_NAME" } } { "d:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/90sp2/quartus/bin/Technology_Viewer.qrui" "16.101 ns" { BY {} BY~combout {} inst27~0 {} inst27 {} Y6 {} } { 0.000ns 0.000ns 6.949ns 0.366ns 3.430ns } { 0.000ns 0.985ns 0.651ns 0.624ns 3.096ns } "" } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 -1}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "212 " "Info: Peak virtual memory: 212 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 07 10:24:29 2022 " "Info: Processing ended: Mon Mar 07 10:24:29 2022" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
|
未顯示二進位檔案。
@@ -0,0 +1,6 @@
|
||||
start_full_compilation:s:00:00:05
|
||||
start_analysis_synthesis:s:00:00:01-start_full_compilation
|
||||
start_analysis_elaboration:s-start_full_compilation
|
||||
start_fitter:s:00:00:02-start_full_compilation
|
||||
start_assembler:s:00:00:01-start_full_compilation
|
||||
start_timing_analyzer:s:00:00:01-start_full_compilation
|
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